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Rename project_num_t to map_to_sized_type_t #1330

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Merged
serge-sans-paille merged 1 commit into from
Apr 28, 2026
Merged

Rename project_num_t to map_to_sized_type_t #1330

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46 changes: 23 additions & 23 deletions include/xsimd/arch/xsimd_neon.hpp
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Original file line number Diff line number Diff line change
Expand Up @@ -238,7 +238,7 @@ namespace xsimd
XSIMD_INLINE batch<R, A> bitwise_cast(batch<T, A> const& arg, batch<R, A> const&, requires_arch<neon>) noexcept
{
using src_register_type = typename batch<T, A>::register_type;
return wrap::x_vreinterpretq<project_num_t<R>, project_num_t<T>>(src_register_type(arg));
return wrap::x_vreinterpretq<map_to_sized_type_t<R>, map_to_sized_type_t<T>>(src_register_type(arg));
}

/*************
Expand Down Expand Up @@ -826,7 +826,7 @@ namespace xsimd
XSIMD_INLINE batch<T, A> add(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<neon>) noexcept
{
using register_type = typename batch<T, A>::register_type;
return wrap::x_vaddq<project_num_t<T>>(register_type(lhs), register_type(rhs));
return wrap::x_vaddq<map_to_sized_type_t<T>>(register_type(lhs), register_type(rhs));
}

/*******
Expand All @@ -848,7 +848,7 @@ namespace xsimd
XSIMD_INLINE batch<T, A> avg(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<neon>) noexcept
{
using register_type = typename batch<T, A>::register_type;
return wrap::x_vhaddq<project_num_t<T>>(register_type(lhs), register_type(rhs));
return wrap::x_vhaddq<map_to_sized_type_t<T>>(register_type(lhs), register_type(rhs));
}

/********
Expand All @@ -870,7 +870,7 @@ namespace xsimd
XSIMD_INLINE batch<T, A> avgr(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<neon>) noexcept
{
using register_type = typename batch<T, A>::register_type;
return wrap::x_vrhaddq<project_num_t<T>>(register_type(lhs), register_type(rhs));
return wrap::x_vrhaddq<map_to_sized_type_t<T>>(register_type(lhs), register_type(rhs));
}

/********
Expand Down Expand Up @@ -904,7 +904,7 @@ namespace xsimd
XSIMD_INLINE batch<T, A> sadd(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<neon>) noexcept
{
using register_type = typename batch<T, A>::register_type;
return wrap::x_vqaddq<project_num_t<T>>(register_type(lhs), register_type(rhs));
return wrap::x_vqaddq<map_to_sized_type_t<T>>(register_type(lhs), register_type(rhs));
}

/*******
Expand Down Expand Up @@ -938,7 +938,7 @@ namespace xsimd
XSIMD_INLINE batch<T, A> sub(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<neon>) noexcept
{
using register_type = typename batch<T, A>::register_type;
return wrap::x_vsubq<project_num_t<T>>(register_type(lhs), register_type(rhs));
return wrap::x_vsubq<map_to_sized_type_t<T>>(register_type(lhs), register_type(rhs));
}

/********
Expand Down Expand Up @@ -972,7 +972,7 @@ namespace xsimd
XSIMD_INLINE batch<T, A> ssub(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<neon>) noexcept
{
using register_type = typename batch<T, A>::register_type;
return wrap::x_vqsubq<project_num_t<T>>(register_type(lhs), register_type(rhs));
return wrap::x_vqsubq<map_to_sized_type_t<T>>(register_type(lhs), register_type(rhs));
}

/*******
Expand Down Expand Up @@ -1002,7 +1002,7 @@ namespace xsimd
XSIMD_INLINE batch<T, A> mul(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<neon>) noexcept
{
using register_type = typename batch<T, A>::register_type;
return wrap::x_vmulq<project_num_t<T>>(register_type(lhs), register_type(rhs));
return wrap::x_vmulq<map_to_sized_type_t<T>>(register_type(lhs), register_type(rhs));
}

/*******
Expand Down Expand Up @@ -1067,7 +1067,7 @@ namespace xsimd
XSIMD_INLINE batch_bool<T, A> eq(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<neon>) noexcept
{
using register_type = typename batch<T, A>::register_type;
return wrap::x_vceqq<project_num_t<T>>(register_type(lhs), register_type(rhs));
return wrap::x_vceqq<map_to_sized_type_t<T>>(register_type(lhs), register_type(rhs));
}

template <class A, class T, detail::exclude_int64_neon_t<T> = 0>
Expand Down Expand Up @@ -1160,7 +1160,7 @@ namespace xsimd
XSIMD_INLINE batch_bool<T, A> lt(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<neon>) noexcept
{
using register_type = typename batch<T, A>::register_type;
return wrap::x_vcltq<project_num_t<T>>(register_type(lhs), register_type(rhs));
return wrap::x_vcltq<map_to_sized_type_t<T>>(register_type(lhs), register_type(rhs));
}

template <class A, class T, detail::enable_sized_signed_t<T, 8> = 0>
Expand Down Expand Up @@ -1205,7 +1205,7 @@ namespace xsimd
XSIMD_INLINE batch_bool<T, A> le(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<neon>) noexcept
{
using register_type = typename batch<T, A>::register_type;
return wrap::x_vcleq<project_num_t<T>>(register_type(lhs), register_type(rhs));
return wrap::x_vcleq<map_to_sized_type_t<T>>(register_type(lhs), register_type(rhs));
}

template <class A, class T, detail::enable_sized_integral_t<T, 8> = 0>
Expand Down Expand Up @@ -1241,7 +1241,7 @@ namespace xsimd
XSIMD_INLINE batch_bool<T, A> gt(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<neon>) noexcept
{
using register_type = typename batch<T, A>::register_type;
return wrap::x_vcgtq<project_num_t<T>>(register_type(lhs), register_type(rhs));
return wrap::x_vcgtq<map_to_sized_type_t<T>>(register_type(lhs), register_type(rhs));
}

template <class A, class T, detail::enable_sized_signed_t<T, 8> = 0>
Expand Down Expand Up @@ -1286,7 +1286,7 @@ namespace xsimd
XSIMD_INLINE batch_bool<T, A> ge(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<neon>) noexcept
{
using register_type = typename batch<T, A>::register_type;
return wrap::x_vcgeq<project_num_t<T>>(register_type(lhs), register_type(rhs));
return wrap::x_vcgeq<map_to_sized_type_t<T>>(register_type(lhs), register_type(rhs));
}

template <class A, class T, detail::enable_sized_integral_t<T, 8> = 0>
Expand Down Expand Up @@ -1341,7 +1341,7 @@ namespace xsimd
XSIMD_INLINE batch<T, A> bitwise_and(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<neon>) noexcept
{
using register_type = typename batch<T, A>::register_type;
return wrap::x_vandq<project_num_t<T>>(register_type(lhs), register_type(rhs));
return wrap::x_vandq<map_to_sized_type_t<T>>(register_type(lhs), register_type(rhs));
}

template <class A, class T, detail::enable_neon_type_t<T> = 0>
Expand Down Expand Up @@ -1386,7 +1386,7 @@ namespace xsimd
XSIMD_INLINE batch<T, A> bitwise_or(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<neon>) noexcept
{
using register_type = typename batch<T, A>::register_type;
return wrap::x_vorrq<project_num_t<T>>(register_type(lhs), register_type(rhs));
return wrap::x_vorrq<map_to_sized_type_t<T>>(register_type(lhs), register_type(rhs));
}

template <class A, class T, detail::enable_neon_type_t<T> = 0>
Expand Down Expand Up @@ -1431,7 +1431,7 @@ namespace xsimd
XSIMD_INLINE batch<T, A> bitwise_xor(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<neon>) noexcept
{
using register_type = typename batch<T, A>::register_type;
return wrap::x_veorq<project_num_t<T>>(register_type(lhs), register_type(rhs));
return wrap::x_veorq<map_to_sized_type_t<T>>(register_type(lhs), register_type(rhs));
}

template <class A, class T, detail::enable_neon_type_t<T> = 0>
Expand Down Expand Up @@ -1491,7 +1491,7 @@ namespace xsimd
XSIMD_INLINE batch<T, A> bitwise_not(batch<T, A> const& arg, requires_arch<neon>) noexcept
{
using register_type = typename batch<T, A>::register_type;
return wrap::x_vmvnq<project_num_t<T>>(register_type(arg));
return wrap::x_vmvnq<map_to_sized_type_t<T>>(register_type(arg));
}

template <class A, class T, detail::enable_neon_type_t<T> = 0>
Expand Down Expand Up @@ -1535,7 +1535,7 @@ namespace xsimd
XSIMD_INLINE batch<T, A> bitwise_andnot(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<neon>) noexcept
{
using register_type = typename batch<T, A>::register_type;
return wrap::x_vbicq<project_num_t<T>>(register_type(lhs), register_type(rhs));
return wrap::x_vbicq<map_to_sized_type_t<T>>(register_type(lhs), register_type(rhs));
}

template <class A, class T, detail::enable_neon_type_t<T> = 0>
Expand Down Expand Up @@ -1572,7 +1572,7 @@ namespace xsimd
XSIMD_INLINE batch<T, A> min(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<neon>) noexcept
{
using register_type = typename batch<T, A>::register_type;
return wrap::x_vminq<project_num_t<T>>(register_type(lhs), register_type(rhs));
return wrap::x_vminq<map_to_sized_type_t<T>>(register_type(lhs), register_type(rhs));
}

template <class A, class T, detail::enable_sized_integral_t<T, 8> = 0>
Expand Down Expand Up @@ -1608,7 +1608,7 @@ namespace xsimd
XSIMD_INLINE batch<T, A> max(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<neon>) noexcept
{
using register_type = typename batch<T, A>::register_type;
return wrap::x_vmaxq<project_num_t<T>>(register_type(lhs), register_type(rhs));
return wrap::x_vmaxq<map_to_sized_type_t<T>>(register_type(lhs), register_type(rhs));
}

template <class A, class T, detail::enable_sized_integral_t<T, 8> = 0>
Expand Down Expand Up @@ -1644,7 +1644,7 @@ namespace xsimd
XSIMD_INLINE batch<T, A> abs(batch<T, A> const& arg, requires_arch<neon>) noexcept
{
using register_type = typename batch<T, A>::register_type;
return wrap::x_vabsq<project_num_t<T>>(register_type(arg));
return wrap::x_vabsq<map_to_sized_type_t<T>>(register_type(arg));
}

/********
Expand Down Expand Up @@ -1992,7 +1992,7 @@ namespace xsimd
{
using bool_register_type = typename batch_bool<T, A>::register_type;
using register_type = typename batch<T, A>::register_type;
return wrap::x_vbslq<project_num_t<T>>(bool_register_type(cond), register_type(a), register_type(b));
return wrap::x_vbslq<map_to_sized_type_t<T>>(bool_register_type(cond), register_type(a), register_type(b));
}

template <class A, class T, bool... b, detail::enable_neon_type_t<T> = 0>
Expand Down Expand Up @@ -3120,7 +3120,7 @@ namespace xsimd
XSIMD_INLINE batch<T, A> rotate_left(batch<T, A> const& a, requires_arch<neon>) noexcept
{
using register_type = typename batch<T, A>::register_type;
return wrap::x_rotate_left<N, project_num_t<T>>(register_type(a), register_type(a));
return wrap::x_rotate_left<N, map_to_sized_type_t<T>>(register_type(a), register_type(a));
}
}

Expand Down
4 changes: 2 additions & 2 deletions include/xsimd/arch/xsimd_neon64.hpp
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Original file line number Diff line number Diff line change
Expand Up @@ -1299,14 +1299,14 @@ namespace xsimd
XSIMD_INLINE batch<double, A> bitwise_cast(batch<T, A> const& arg, batch<double, A> const&, requires_arch<neon64>) noexcept
{
using register_type = typename batch<T, A>::register_type;
return wrap::x_vreinterpretq<double, project_num_t<T>>(register_type(arg));
return wrap::x_vreinterpretq<double, map_to_sized_type_t<T>>(register_type(arg));
}

template <class A, class R>
XSIMD_INLINE batch<R, A> bitwise_cast(batch<double, A> const& arg, batch<R, A> const&, requires_arch<neon64>) noexcept
{
using src_register_type = typename batch<double, A>::register_type;
return wrap::x_vreinterpretq<project_num_t<R>, double>(src_register_type(arg));
return wrap::x_vreinterpretq<map_to_sized_type_t<R>, double>(src_register_type(arg));
}

template <class A>
Expand Down
10 changes: 5 additions & 5 deletions include/xsimd/arch/xsimd_rvv.hpp
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Expand Up @@ -388,7 +388,7 @@ namespace xsimd
// A bit of a dance, here, because rvvmv_splat has no other
// argument from which to deduce type, and T=char is not
// supported.
project_num_t<T> arg_not_char(arg);
map_to_sized_type_t<T> arg_not_char(arg);
const auto splat = rvvmv_splat(arg_not_char);
return rvv_reg_t<T, Width>(splat.get_bytes(), types::detail::XSIMD_RVV_BITCAST);
}
Expand All @@ -414,7 +414,7 @@ namespace xsimd
template <class A, class T, detail::enable_arithmetic_t<T> = 0>
XSIMD_INLINE batch<T, A> load_aligned(T const* src, convert<T>, requires_arch<rvv>) noexcept
{
return detail_rvv::rvvle(reinterpret_cast<project_num_t<T> const*>(src));
return detail_rvv::rvvle(reinterpret_cast<map_to_sized_type_t<T> const*>(src));
}

template <class A, class T, detail::enable_arithmetic_t<T> = 0>
Expand Down Expand Up @@ -491,7 +491,7 @@ namespace xsimd
template <class A, class T, detail::enable_arithmetic_t<T> = 0>
XSIMD_INLINE void store_aligned(T* dst, batch<T, A> const& src, requires_arch<rvv>) noexcept
{
detail_rvv::rvvse(reinterpret_cast<project_num_t<T>*>(dst), src);
detail_rvv::rvvse(reinterpret_cast<map_to_sized_type_t<T>*>(dst), src);
}

template <class A, class T, detail::enable_arithmetic_t<T> = 0>
Expand Down Expand Up @@ -522,7 +522,7 @@ namespace xsimd
{
using UU = as_unsigned_integer_t<U>;
const auto uindex = detail_rvv::rvv_to_unsigned_batch(index);
auto* base = reinterpret_cast<project_num_t<T>*>(dst);
auto* base = reinterpret_cast<map_to_sized_type_t<T>*>(dst);
// or rvvsuxei
const auto bi = detail_rvv::rvvmul_splat(uindex, sizeof(T));
detail_rvv::rvvsoxei(base, bi, vals);
Expand All @@ -534,7 +534,7 @@ namespace xsimd
{
using UU = as_unsigned_integer_t<U>;
const auto uindex = detail_rvv::rvv_to_unsigned_batch(index);
auto const* base = reinterpret_cast<project_num_t<T> const*>(src);
auto const* base = reinterpret_cast<map_to_sized_type_t<T> const*>(src);
// or rvvluxei
const auto bi = detail_rvv::rvvmul_splat(uindex, sizeof(T));
return detail_rvv::rvvloxei(base, bi);
Expand Down
6 changes: 3 additions & 3 deletions include/xsimd/arch/xsimd_sve.hpp
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Expand Up @@ -92,7 +92,7 @@ namespace xsimd
template <class A, class T, detail::enable_arithmetic_t<T> = 0>
XSIMD_INLINE batch<T, A> load_aligned(T const* src, convert<T>, requires_arch<sve>) noexcept
{
return svld1(detail_sve::ptrue<T>(), reinterpret_cast<project_num_t<T> const*>(src));
return svld1(detail_sve::ptrue<T>(), reinterpret_cast<map_to_sized_type_t<T> const*>(src));
}

template <class A, class T, detail::enable_arithmetic_t<T> = 0>
Expand All @@ -105,7 +105,7 @@ namespace xsimd
template <class A, class T, bool... Values, class Mode, detail::enable_arithmetic_t<T> = 0>
XSIMD_INLINE batch<T, A> load_masked(T const* mem, batch_bool_constant<float, A, Values...>, Mode, requires_arch<sve>) noexcept
{
return svld1(detail_sve::pmask<Values...>(), reinterpret_cast<project_num_t<T> const*>(mem));
return svld1(detail_sve::pmask<Values...>(), reinterpret_cast<map_to_sized_type_t<T> const*>(mem));
}

// load_complex
Expand All @@ -132,7 +132,7 @@ namespace xsimd
template <class A, class T, detail::enable_arithmetic_t<T> = 0>
XSIMD_INLINE void store_aligned(T* dst, batch<T, A> const& src, requires_arch<sve>) noexcept
{
svst1(detail_sve::ptrue<T>(), reinterpret_cast<project_num_t<T>*>(dst), src);
svst1(detail_sve::ptrue<T>(), reinterpret_cast<map_to_sized_type_t<T>*>(dst), src);
}

template <class A, class T, detail::enable_arithmetic_t<T> = 0>
Expand Down
4 changes: 2 additions & 2 deletions include/xsimd/types/xsimd_rvv_register.hpp
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Original file line number Diff line number Diff line change
Expand Up @@ -326,7 +326,7 @@ namespace xsimd
operator register_type() const noexcept { return value.get(); }
};
template <class T, size_t Width = XSIMD_RVV_BITS>
using rvv_reg_t = std::conditional_t<!std::is_void<T>::value, rvv_reg<project_num_t<T>, Width>, void>;
using rvv_reg_t = std::conditional_t<!std::is_void<T>::value, rvv_reg<map_to_sized_type_t<T>, Width>, void>;

// And some more of the same stuff for bool types, which have
// similar problems and similar workarounds.
Expand Down Expand Up @@ -388,7 +388,7 @@ namespace xsimd

template <class T, size_t Width = XSIMD_RVV_BITS>
using rvv_bool_t = std::enable_if_t < !std::is_void<T>::value,
rvv_bool<project_num_t<T>, Width<rvv_width_m1 ? rvv_width_m1 : Width>>;
rvv_bool<map_to_sized_type_t<T>, Width<rvv_width_m1 ? rvv_width_m1 : Width>>;

template <size_t S>
struct rvv_vector_type_impl;
Expand Down
2 changes: 1 addition & 1 deletion include/xsimd/utils/xsimd_type_traits.hpp
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Expand Up @@ -127,7 +127,7 @@ namespace xsimd
* @tparam T arithmetic type to project from.
*/
template <typename T>
using project_num_t = typename detail::remap_num<T, /* factor= */ 1>::type;
using map_to_sized_type_t = typename detail::remap_num<T, /* factor= */ 1>::type;

/**
* @ingroup type_traits
Expand Down
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