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minor fixes to scr5 support and pmu lib #29

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minor fixes to scr5 support and pmu lib #29

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6dd7316
fix typo in sc_lib_experimental_enable_pmu_counters
aap-sc Aug 12, 2026
9a34681
scr5: fix incorrect value returned by -scr5-tlb-csr-base
aap-sc Aug 12, 2026
f5a4a8a
scr5: fix UB in tlb search routin on 64-bit targets
aap-sc Aug 12, 2026
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6 changes: 4 additions & 2 deletions src/target/riscv/scr5.c
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Original file line number Diff line number Diff line change
Expand Up @@ -155,7 +155,7 @@ static int scr5_jim_configure(struct target *target,
if (!goi->is_configure) {
if (goi->argc != 0)
goto cget_extra_args;
Jim_SetResultFormatted(goi->interp, "%u", pc->tlb_n_entries);
Jim_SetResultFormatted(goi->interp, "%u", pc->tlb_csr_base);
return JIM_OK;
}
e = jim_getopt_wide(goi, &w);
Expand Down Expand Up @@ -230,7 +230,9 @@ static int scr5_search_tlb(struct target *target, target_addr_t virt_addr,
for (unsigned int tlb_sel = 0; tlb_sel <= 1; ++tlb_sel) {
for (unsigned int pte_idx = 0; pte_idx < pc->tlb_n_entries; ++pte_idx) {
res = riscv_reg_set(target, tlb_scan_csr,
tlb_sel << tlb_sel_offset | pte_idx);
((riscv_reg_t)tlb_sel << tlb_sel_offset) | pte_idx);
if (res != ERROR_OK)
goto cleanup;
riscv_reg_t tlb_attr, tlb_va;
res = riscv_reg_get(target, &tlb_attr, tlb_attr_csr);
if (res != ERROR_OK)
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2 changes: 1 addition & 1 deletion tcl/syntacore/sc_fpga_lib.tcl
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Expand Up @@ -140,7 +140,7 @@ namespace eval _SC_INTERNALS {
en_ir
pmu_ctrs } {
set pmu_ctrs [lsort -unique $pmu_ctrs]
if {[llength pmu_ctrs] > $pmu_ctrs_max} {
if {[llength $pmu_ctrs] > $pmu_ctrs_max} {
error "too many PMU counters requested was requested"
}
set inhibit_value 0xffffffff
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