media: qcom: iris: encoder feature enhancements batch2 - #867
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Merge Check Failed: No Change Task Found No associated change tasks found for CR 4623257 on any of the following entities: Entities:
CR: 4623257 Please ensure the CR has a change task associated with at least one of the entities for this branch. |
PR #867 — validate-patchPR: #867
Final Summary
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PR #867 — checker-log-analyzerPR: #867
Detailed report: Full report
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WangaoW Sorry to hijack this thread. I noticed that the encoder implementation in the downstream video-driver references The 10-bit decoding was supported recently. Are there any plans to upstream support for 10-bit encoding (HEVC Main10 / P010) to the new Iris driver? This is very useful for HDR10 encoding use cases. |
Yes, we do plan to support HDR10 for encode as well. Immediate plan is to support ROI (patches posted), followed by HDR10+ decode. Next would be HDR10 encode. |
vgarodia Thank you for the reply. Based on my overview of the downstream video-driver, not every platform supports 10-bit encoding (I am unsure whether this is due to hardware limitations or a lack of implementation in the firmware). It would be great to have a feature matrix placed somewhere documenting VPU support for 10-bit encoding and similar codec specs across the various platforms. For example, something like https://developer.nvidia.com/video-encode-decode-support-matrix My primary use case is FFmpeg, including patching it to use 10-bit support when necessary. I am currently running on the QCS6490 and SC8280XP, and might be able to test on the X1E in the future. |
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Merge Check Failed: CR Not Eligible for Merge CR 4623257 is not eligible for merge. The parent software image for kernel.qli.2.0 is not development complete. Entity: Please ensure the CR passes both CCT (ComponentChangeTasks) and ICT (Integration Change Tasks) validations. |
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Merge Check Failed: CR Not Eligible for Merge CR 4623257 is not eligible for merge. The parent software image for kernel.qli.2.0 is not development complete. Entity: Please ensure the CR passes both CCT (ComponentChangeTasks) and ICT (Integration Change Tasks) validations. |
PR #867 — validate-patchPR: #867
Final Summary
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PR #867 — checker-log-analyzerPR: #867
Detailed report: Full report
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Add support for intra refresh configuration on gen1 encoder by enabling V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD and V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE controls. Reviewed-by: Dikshita Agarwal <dikshita.agarwal@oss.qualcomm.com> Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8650-HDK Signed-off-by: Wangao Wang <wangao.wang@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Bryan O'Donoghue <bod@kernel.org> Link: https://lore.kernel.org/linux-arm-msm/20260512-batch2_features-v7-1-4954e3b4df84@oss.qualcomm.com/
Add Long-Term Reference(LTR) frame support for both gen1 and gen2 encoders by enabling the following V4L2 controls: V4L2_CID_MPEG_VIDEO_LTR_COUNT V4L2_CID_MPEG_VIDEO_USE_LTR_FRAMES V4L2_CID_MPEG_VIDEO_FRAME_LTR_INDEX Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8650-HDK Reviewed-by: Dikshita Agarwal <dikshita.agarwal@oss.qualcomm.com> Signed-off-by: Wangao Wang <wangao.wang@oss.qualcomm.com> Signed-off-by: Bryan O'Donoghue <bod@kernel.org> Link: https://lore.kernel.org/linux-arm-msm/20260512-batch2_features-v7-2-4954e3b4df84@oss.qualcomm.com/
Add support for B-frame configuration on both gen1 and gen2 encoders by enabling V4L2_CID_MPEG_VIDEO_B_FRAMES control. Reviewed-by: Dikshita Agarwal <dikshita.agarwal@oss.qualcomm.com> Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8650-HDK Signed-off-by: Wangao Wang <wangao.wang@oss.qualcomm.com> Signed-off-by: Bryan O'Donoghue <bod@kernel.org> Link: https://lore.kernel.org/linux-arm-msm/20260512-batch2_features-v7-3-4954e3b4df84@oss.qualcomm.com/
Add hierarchical coding support for both gen1 and gen2 encoders by enabling the following V4L2 controls: H264: V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING, V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_TYPE, V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_LAYER HEVC(gen2 only): V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE, V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER Reviewed-by: Vikash Garodia <vikash.garodia@oss.qualcomm.com> Signed-off-by: Wangao Wang <wangao.wang@oss.qualcomm.com> Signed-off-by: Bryan O'Donoghue <bod@kernel.org> Link: https://lore.kernel.org/linux-arm-msm/20260512-batch2_features-v7-4-4954e3b4df84@oss.qualcomm.com/
…t_property Modify iris_hfi_gen1_packet_session_set_property to simplify size calculations and remove redundant code patterns. Previously, packet->shdr.hdr.size was incremented by sizeof(u32) in every switch case, resulting in repetitive and less maintainable logic. Reviewed-by: Dikshita Agarwal <dikshita.agarwal@oss.qualcomm.com> Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8650-HDK Signed-off-by: Wangao Wang <wangao.wang@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Bryan O'Donoghue <bod@kernel.org> Link: https://lore.kernel.org/linux-media/20260512-batch2_features-v7-5-4954e3b4df84@oss.qualcomm.com/
Unify AVC/HEVC handling by computing codec and lcu_size upfront. Reviewed-by: Dikshita Agarwal <dikshita.agarwal@oss.qualcomm.com> Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8650-HDK Signed-off-by: Wangao Wang <wangao.wang@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Bryan O'Donoghue <bod@kernel.org> Link: https://lore.kernel.org/linux-media/20260512-batch2_features-v7-6-4954e3b4df84@oss.qualcomm.com/
Add hfi_id to gen1 encoder GOP_SIZE cap and replace the set function, remove the redundant INTRA_PERIOD cap. Fixes: d22037f ("media: iris: Set platform capabilities to firmware for encoder video device") Reviewed-by: Vishnu Reddy <busanna.reddy@oss.qualcomm.com> Signed-off-by: Wangao Wang <wangao.wang@oss.qualcomm.com> Reviewed-by: Vikash Garodia <vikash.garodia@oss.qualcomm.com> Cc: stable@vger.kernel.org Signed-off-by: Bryan O'Donoghue <bod@kernel.org> Link: https://lore.kernel.org/linux-media/20260723-dynamic_encode-v4-1-5fd6bd549ead@oss.qualcomm.com/
Add request key frame support for both gen1 and gen2 encoders by enabling V4L2_CID_MPEG_VIDEO_FORCE_KEY_FRAME. Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Reviewed-by: Vishnu Reddy <busanna.reddy@oss.qualcomm.com> Signed-off-by: Wangao Wang <wangao.wang@oss.qualcomm.com> Reviewed-by: Vikash Garodia <vikash.garodia@oss.qualcomm.com> Signed-off-by: Bryan O'Donoghue <bod@kernel.org> Link: https://lore.kernel.org/linux-media/20260723-dynamic_encode-v4-2-5fd6bd549ead@oss.qualcomm.com/
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Merge Check Failed: CR Not Eligible for Merge CR 4623257 is not eligible for merge. The parent software image for kernel.qli.2.0 is not development complete. Entity: Please ensure the CR passes both CCT (ComponentChangeTasks) and ICT (Integration Change Tasks) validations. |
PR #867 — validate-patchPR: #867
Final Summary
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PR #867 — checker-log-analyzerPR: #867
Detailed report: Full report
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Test Matrix
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🔨 Build Failure Analysis — PR #867PR: #867 Build Status: ✅ SUCCESSFULBoth kernel builds (standard and RT) completed successfully with zero compilation errors. Workflow Failure Root CauseThe workflow was marked as failed due to LAVA test job submission failures, not build errors.
Error: All 10 test jobs (hamoa-iot-evk, lemans-evk, monaco-evk, purwa-iot-evk, qcs615-ride, qcs6490-rb3gen2, qcs8300-ride, qcs9100-ride-r3, qrb2210-rb1, shikra-iqs-evk) failed to submit due to this infrastructure issue. VerdictZero compilation errors. The PR changes (8 patches to the iris media driver) built cleanly. The workflow failure is due to LAVA server connectivity issues, not code problems introduced by this PR. 📎 Detailed analysis: Full report |
🔨 Build Failure Analysis — PR #867PR: #867 Build Status: ✅ SUCCESSFULBoth kernel builds (standard and RT) completed successfully with no compilation errors. Workflow Failure Root CauseThe workflow failed during the test submission phase, not during compilation. All test jobs failed to submit to the LAVA test infrastructure due to a network timeout: VerdictNo compilation errors were introduced by this PR. The workflow failure is due to infrastructure issues (LAVA server connectivity timeout), not code problems. The PR changes compiled cleanly for both standard and RT kernel configurations. 📎 Detailed analysis: Full report |
🔨 Build Failure Analysis — PR #867PR: #867 Build Status: ✅ SUCCESSBoth the standard and RT kernel builds completed successfully with no compilation errors. Test Status: ❌ FAILED (Infrastructure Issue)All 10 LAVA test jobs failed due to infrastructure connectivity issues, not due to code changes in this PR.
VerdictNo compilation errors were introduced by this PR. The workflow failure is entirely due to LAVA test infrastructure connectivity issues (connection timeouts to lava-oss.qualcomm.com). The kernel built successfully for both standard and RT configurations. 📎 Detailed analysis: Full report |
🔨 Build Failure Analysis — PR #867PR: #867 Build Status: ✅ SUCCESSBoth kernel builds (standard and RT) completed successfully with no compilation errors. Test Status: ❌ INFRASTRUCTURE FAILUREAll 10 test jobs failed due to LAVA server connectivity issues:
VerdictNo compilation errors were introduced by this PR. The workflow failure is entirely due to LAVA test infrastructure (lava-oss.qualcomm.com) being unreachable during test job submission. The PR code changes compiled cleanly. 📎 Detailed analysis: Full report |
🔨 Build Failure Analysis — PR #867PR: #867 Build Status: ✅ SUCCESSFULBoth kernel builds (standard and RT) completed successfully with no compilation errors. Workflow Failure Root CauseThe workflow was marked as failed due to a LAVA test infrastructure timeout, not due to any build or code issues introduced by this PR. Error Details:
Verdict0 compilation errors found. This PR introduces no build failures. The workflow failure is entirely due to external infrastructure (LAVA server connectivity timeout) and is unrelated to the code changes in this PR. 📎 Detailed analysis: Full report |
🔨 Build Failure Analysis — PR #867PR: #867 Build Status: ✅ SUCCESSBoth kernel builds (standard and RT) completed successfully with no compilation errors.
Compilation Errors: NONENo compilation errors were found in either build log. The iris driver changes compiled cleanly. Warnings: 28 (all pre-existing)All 28 warnings found in the build logs are pre-existing and unrelated to the PR changes:
None of these warnings are in files modified by this PR. Workflow Failure Root CauseThe workflow failed due to LAVA test infrastructure timeout, not build failures: Verdict0 of 0 errors are introduced by this PR. All builds passed successfully. The workflow failure is due to test infrastructure connectivity issues, not code problems. 📎 Detailed analysis: Full report |
🔨 Build Failure Analysis — PR #867PR: #867
VerdictNo compilation errors found. Both kernel builds (standard and RT) completed successfully. The workflow failed due to test infrastructure issues (LAVA job submission failures), not build compilation errors. 📎 Detailed analysis: Full report |
🔨 Build Failure Analysis — PR #867PR: #867
VerdictNo build errors detected. Both kernel builds (standard and RT) completed successfully. The workflow failure was caused by LAVA test infrastructure connectivity issues (timeouts connecting to lava-oss.qualcomm.com), not by any code introduced in this PR. 📎 Detailed analysis: Full report |
🔨 Build Failure Analysis — PR #867PR: #867
VerdictThe kernel build succeeded. The workflow failed due to LAVA test infrastructure timeout (connection to 📎 Detailed analysis: Full report |
🔨 Build Failure Analysis — PR #867PR: #867
VerdictThis is NOT a build failure. Both kernel builds (standard and RT) completed successfully with no compilation errors. The workflow failed due to LAVA test infrastructure timeout when attempting to submit test jobs to 📎 Detailed analysis: Full report |
Test Matrix
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WangaoW rebase this on tip |
LAVA Failed Case Triage SummaryPR: #867 Job 207566 | SoC qcs9100-rideLAVA job: https://lava-oss.qualcomm.com/scheduler/job/207566 Failed test cases in LAVA job 207566 (SoC: qcs9100-ride).
Job 207567 | SoC purwa-evkLAVA job: https://lava-oss.qualcomm.com/scheduler/job/207567 Failed test cases in LAVA job 207567 (SoC: purwa-evk).
Job 207568 | SoC qcs6490-rb3gen2LAVA job: https://lava-oss.qualcomm.com/scheduler/job/207568 Failed test cases in LAVA job 207568 (SoC: qcs6490-rb3gen2).
Job 207569 | SoC qcs8300-rideLAVA job: https://lava-oss.qualcomm.com/scheduler/job/207569 Failed test cases in LAVA job 207569 (SoC: qcs8300-ride).
Job 207570 | SoC qcs615-rideLAVA job: https://lava-oss.qualcomm.com/scheduler/job/207570 Failed test cases in LAVA job 207570 (SoC: qcs615-ride).
Job 207571 | SoC hamoa-evkLAVA job: https://lava-oss.qualcomm.com/scheduler/job/207571 Failed test cases in LAVA job 207571 (SoC: hamoa-evk).
Job 207572 | SoC lemans-evkLAVA job: https://lava-oss.qualcomm.com/scheduler/job/207572 Failed test cases in LAVA job 207572 (SoC: lemans-evk).
Job 207573 | SoC shikra-iqs-evkLAVA job: https://lava-oss.qualcomm.com/scheduler/job/207573 Failed test cases in LAVA job 207573 (SoC: shikra-iqs-evk).
Job 207574 | SoC monaco-evkLAVA job: https://lava-oss.qualcomm.com/scheduler/job/207574 Failed test cases in LAVA job 207574 (SoC: monaco-evk).
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This patch series introduces several enhancements to the Qualcomm Iris
encoder driver, improving support for V4L2 controls and enabling more
video encoding features.
All patches have been tested with v4l2-compliance and v4l2-ctl on
gen1:SM8250, QCS6490, gen2:QCS8300, QCS8550, QCS9100, X1E-80100.
CRs-Fixed: 4623257