8382315: RISC-V: TestMultiplyReductionByte.java fails with guarantee(is_uimm5(imm)) failed: uimm is invalid#30759
8382315: RISC-V: TestMultiplyReductionByte.java fails with guarantee(is_uimm5(imm)) failed: uimm is invalid#30759DingliZhang wants to merge 2 commits intoopenjdk:masterfrom
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…is_uimm5(imm)) failed: uimm is invalid
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Thanks all for the review! |
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Going to push as commit da0a7b1.
Your commit was automatically rebased without conflicts. |
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@DingliZhang Pushed as commit da0a7b1. 💡 You may see a message that your pull request was closed with unmerged commits. This can be safely ignored. |
Hi, please review.
The vector slide down instruction
vslidedown_vican only encode a 5-bit zero-extended offset.But that is not handled properly in
C2_MacroAssembler::reduce_mul_integral_vwhich uses this instruction.The contraint won't be satisfied when running
compiler.vectorapi.TestMultiplyReductionByte::testMulReduce512with a much larger MaxVectorSize (>= 64 bytes).
This fixes the issue by introducing a new macro-assembler routine
slidedown_vwhich would do the checkand delegates work to either
vslidedown_viorvslidedown_vxaccordingly.Testing:
Same test using fastdebug build on linux-riscv64 qemu (MaxVectorSize = 64).
hs:tier1-hs:tier3using fastdebug build on linux-riscv64 qemu (MaxVectorSize = 16).Progress
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