llvm: more tentatives at optimal field addition with pure LLVM IR

[mratsim]

This PR has changes behind the code generator from #456 that triggered issues:

• [Isel x86] i320+ generates useless extra instruction when chaining icmp and select based on underflow llvm/llvm-project#103841
• [Isel Aarch64] extra instruction (i256) or 2 instructions (i320) when chaining icmp and select based on underflow llvm/llvm-project#103855
• [opt / isel] 66% more unnecessary instructions generated due to bad pattern or missed sbb/icmp/cmov fusion llvm/llvm-project#103946

for Bigints of size 254/255 the LLVM IR has better worst case codegen than builtin llvm.usub.with.overflow (1~2 extra instructions instead of 33% extra instructions #357 (comment)) but for size 256 it degrades to 66% extra instructions.