[csrng,dv] Fix instantiation of test in tb#30038
[csrng,dv] Fix instantiation of test in tb#30038rswarbrick wants to merge 5 commits intolowRISC:masterfrom
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Force push replaces a call to |
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Gah! And I should have looked more closely at the failing lint check before pushing. The latest force-push fixes that too. |
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Thanks a lot for fixing this and cleaning it up @rswarbrick! Having the number of HW interfaces set separately in dv and rtl surely wasn't elegant at all.
I only have some very small remarks, LGTM. Some of the uvm related changes are outside my realm of knowledge, so it would probably be good if someone else also takes a peek at it.
Sorry for the forgotten parameter in the tb. I think I ran into the issue with VCS myself once but then somehow must have forgotten to fix this. And I agree that it is very odd that Xcelium just jugs along and compiles fine.
| cs_item_q = new[cfg.m_num_hw_apps + 1]; | ||
| uninstantiate = new[cfg.m_num_hw_apps + 1]; |
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Nit: Since these data structures are not specific to the HW interfaces, I think using m_num_apps here would be a bit better. Also, a new reader must be aware of the +1 relationship between m_num_apps and m_num_hw_apps to fully understand this part of the code.
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I agree! (I think I might have written the first version of this before m_num_apps existed). Thanks for pointing it out.
| rand bit [NUM_HW_APPS:0] int_state_read_enable; | ||
| bit [NUM_HW_APPS:0] chk_int_state_read_enable; | ||
| rand bit [MaxNumHwApps:0] int_state_read_enable; | ||
| bit [MaxNumHwApps:0] chk_int_state_read_enable; |
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Nit: Should we right-align the vector sizes here?
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I'm not sure. The problem is that you end up with
rand bit [MaxNumHwApps:0] int_state_read_enable;
bit [MaxNumHwApps:0] chk_int_state_read_enable;which is a bit weird because it's treating "rand bit" and "bit" as being the same sort of thing.
Something like this would be consistent
rand bit [MaxNumHwApps:0] int_state_read_enable;
bit [MaxNumHwApps:0] chk_int_state_read_enable;but it's extremely ugly!
Do you have any better ideas? (Maybe I'm missing something obvious...(
| cs_item = new[cfg.m_num_hw_apps + 1]; | ||
| es_item = new[cfg.m_num_hw_apps + 1]; | ||
| es_item_q = new[cfg.m_num_hw_apps + 1]; | ||
| prd_genbits_q = new[cfg.m_num_hw_apps + 1]; | ||
| cs_data = new[cfg.m_num_hw_apps + 1]; | ||
| es_data = new[cfg.m_num_hw_apps + 1]; | ||
| fips = new[cfg.m_num_hw_apps + 1]; | ||
| cmd_sts = new[cfg.m_num_hw_apps + 1]('{default: CMD_STS_SUCCESS}); |
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Maybe also better use m_num_apps here.
| .csrng_cmd_i (csrng_cmd_req[dut.NumHwApps-1:0]), | ||
| .csrng_cmd_o (csrng_cmd_rsp[dut.NumHwApps-1:0]), |
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I think the slice select here is not necessary and we can just reference the whole vector?
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You're completely right! I originally wrote that code before I'd imported csrng_reg_pkg::NumApps, which meant I had some horrible "max footprint" thing.
Looking closely, I see that I was also making a generate loop depend on on dut.NumHwApps. I'll fix that too.
Thanks for spotting the bit I hadn't cleaned up :-)
| csrng_pkg::csrng_req_t[NumApps-2:0] csrng_cmd_req; | ||
| csrng_pkg::csrng_rsp_t[NumApps-2:0] csrng_cmd_rsp; |
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Could we use dut.NumHwApps here?
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Hmm. I'm not sure. After getting rid of the silly slices (that you pointed out in the previous note), we don't need to look inside the dut at all (no occurrence of "dut." being added to the testbench).
I'm sort of enthusiastic about only depending on the "outside" (or the auto-generated bits). Does that sound reasonable to you?
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Just came to my mind: Did you get a chance to run a full regression for |
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The interface is only instantiated by binding it into an instance of csrng (which has a NumHwApps localparam). Use that value as we get built. The only tricky item was defining cp_hw_inst_exc. Signed-off-by: Rupert Swarbrick <rswarbrick@lowrisc.org>
Signed-off-by: Rupert Swarbrick <rswarbrick@lowrisc.org>
This can be extracted from the instantiated dut in the tb, which passes it to the test through uvm_config_db. The test can then configure the csrng_env_cfg object before calling initialize. Signed-off-by: Rupert Swarbrick <rswarbrick@lowrisc.org>
The environment config gets randomized in dv_base_test::build_phase anyway. Signed-off-by: Rupert Swarbrick <rswarbrick@lowrisc.org>
This is mostly pretty mechanical, but these notes describe the changes in a bit more detail. - In the environment (including in virtual sequences), the number of HW apps is available in cfg.m_num_hw_apps. - The various arrays in csrng_scoreboard can be made dynamic and built at runtime (by which time cfg.m_num_hw_apps will have been set up) - The same trick can be used in the (copy-paste?) code that creates m_edn_push_seq in the various virtual sequences and also in csrng_cmds_vseq. - In csrng_regwen_vseq, there are two packed bit vectors that needed to be given a max footprint, but the extra stray bits won't be read anywhere. - In tb.sv, we can make the only "parameter dependence" come from csrng_reg_pkg (which was auto-generated from the hjson description). Importing csrng_reg_pkg::NumApps means we don't have to "look inside" the dut with e.g. dut.NumHwApps. - (Finally) We can get rid of the invalid NHwApps parameter given to the dut instance. Signed-off-by: Rupert Swarbrick <rswarbrick@lowrisc.org>
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First force-push addressed the notes from @glaserf and the second one just rebases onto master (to pick up some clean-ups in the agent drivers). If looking at the "compare" links, I suggest the first one :-) |
I've just run the csrng tests with the current version of master (2ee0202) plus this PR and get the following results:
The numbers (both pass rate and coverage) are essentially the same as the weekly run from last weekend. I don't think this change can affect the DV for |

This fixes #30034, and also teaches the environment to be more agnostic about the number of HW apps supported by CSRNG.