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1 change: 1 addition & 0 deletions components/zkernel/CMakeLists.txt
Original file line number Diff line number Diff line change
Expand Up @@ -5,6 +5,7 @@ set(srcs
"src/k_event.c"
"src/k_thread.c"
"src/k_work.c"
"src/ring_buf.c"
"src/sys_init.c"
"src/fatal.c"
)
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11 changes: 11 additions & 0 deletions components/zkernel/Kconfig
Original file line number Diff line number Diff line change
@@ -1,5 +1,16 @@
menu "Boreas Kernel (zkernel)"

config RING_BUFFER_LARGE
bool "Use 32-bit ring buffer indices"
default n
help
Widens the ring buffer index type from uint16_t to uint32_t,
raising the maximum ring_buf capacity from 32767 bytes to
~2 GiB at the cost of 12 extra bytes per struct ring_buf
(six index fields widen by 2 bytes each; 20 -> 32 bytes on
the 32-bit target). Mirrors upstream Zephyr's
CONFIG_RING_BUFFER_LARGE.

config ZKERNEL_MUTEX_DEBUG
bool "Enable mutex lock-ordering assertions"
default n
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33 changes: 33 additions & 0 deletions components/zkernel/include/boreas/zephyr/sys/__assert.h
Original file line number Diff line number Diff line change
@@ -0,0 +1,33 @@
/*
* SPDX-License-Identifier: Apache-2.0
* Copyright 2026 Intercreate
*
* Zephyr-compatible runtime assertions (upstream <zephyr/sys/__assert.h>
* spellings).
*
* Divergence: upstream compiles these out unless CONFIG_ASSERT=y
* (default n); Boreas keeps them always on -- they log and abort.
* NOT safe from IRAM ISR context (ESP_LOGE + abort are flash-resident).
* Use k_panic() (sys/util.h) for unrecoverable errors in ISR/IRAM
* context.
*/

#pragma once

#ifndef __ASSERT
#include <stdlib.h> /* abort() */

#include "esp_log.h"
#define __ASSERT(cond, msg) \
do { \
if (!(cond)) { \
ESP_LOGE("ASSERT", "%s at %s:%d", (msg), __FILE__, __LINE__); \
abort(); \
} \
} while (0)
#endif

/* Assertion with no message (upstream spelling). */
#ifndef __ASSERT_NO_MSG
#define __ASSERT_NO_MSG(cond) __ASSERT((cond), "")
#endif
8 changes: 6 additions & 2 deletions components/zkernel/include/boreas/zephyr/sys/byteorder.h
Original file line number Diff line number Diff line change
@@ -1,9 +1,13 @@
/*
* SPDX-License-Identifier: Apache-2.0
* Copyright 2026 Intercreate
* Copyright (c) 2015-2016 Intel Corporation (upstream Zephyr)
* Copyright 2026 Intercreate (Boreas)
*
* Zephyr-compatible byte-order helpers for little- and big-endian
* 16- and 32-bit access over byte buffers.
* 16- and 32-bit access over byte buffers. The big/little-endian
* 32-bit composition mirrors upstream's canonical chaining closely
* enough to retain the upstream copyright; the 16-bit leaf functions
* are independently written.
*
* @note Upstream Zephyr also provides 24/48/64-bit variants
* (sys_{get,put}_{le,be}{24,48,64}). These are intentionally
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