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page_attn: make global-max reduction order-invariant - #535

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page_attn: make global-max reduction order-invariant#535
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The phase-1 decode kernels reduced the per-head global max with a
fcmpxchg-if-first / fmax-else scheme that assumed pGlobalMax was seeded
  to 0. That contract was implicit and fragile:

    1. Single-tile case (max_seq_len <= 64): only arrival 0 runs, via fcmpxchg(expected 0). Any seed other than 0 leaves pGlobalMax untouched, so the max is never written.
    2. Even with a 0 seed the reduction is not order-invariant: a later arrival's fmax(0, neg) = 0 can mask a negative max before arrival 0's fcmpxchg overwrites it, losing the true max whenever the whole head's max is negative.

  Replace it with the mathematically correct reduction: seed pGlobalMax
  to FP32_MIN (the identity for max) and have every arrival do an
  unconditional atomic fmax. This is order-invariant and seed-explicit;
  the arrival counter (pPollP) is now unused in this path but kept so the
  buffer layout is unchanged.

  Applied to the fp16 (GQA=4, GQA=2) and fp8 (E4M3FN, E5M2) phase-1
  kernels, with the matching FP32_MIN seed of the pGlobalMax slice in
  page_attn_decode.

  Files:
    csrc/eagle/page.attn.h      fp16 GQA=4/GQA=2 phase-1
    csrc/eagle/page.attn.fp8.h  fp8 GQA=4/GQA=2 phase-1
    csrc/eagle/eagle.sycl       seed pGlobalMax slice to FP32_MIN

    The phase-1 decode kernels reduced the per-head global max with a
    fcmpxchg-if-first / fmax-else scheme that assumed pGlobalMax was seeded
      to 0. That contract was implicit and fragile:

        1. Single-tile case (max_seq_len <= 64): only arrival 0 runs, via
           fcmpxchg(expected 0). Any seed other than 0 leaves pGlobalMax
           untouched, so the max is never written.
        2. Even with a 0 seed the reduction is not order-invariant: a later
           arrival's fmax(0, neg) = 0 can mask a negative max before arrival
           0's fcmpxchg overwrites it, losing the true max whenever the whole
           head's max is negative.

      Replace it with the mathematically correct reduction: seed pGlobalMax
      to FP32_MIN (the identity for max) and have every arrival do an
      unconditional atomic fmax. This is order-invariant and seed-explicit;
      the arrival counter (pPollP) is now unused in this path but kept so the
      buffer layout is unchanged.

      Applied to the fp16 (GQA=4, GQA=2) and fp8 (E4M3FN, E5M2) phase-1
      kernels, with the matching FP32_MIN seed of the pGlobalMax slice in
      page_attn_decode.

      Files:
        csrc/eagle/page.attn.h      fp16 GQA=4/GQA=2 phase-1
        csrc/eagle/page.attn.fp8.h  fp8 GQA=4/GQA=2 phase-1
        csrc/eagle/eagle.sycl       seed pGlobalMax slice to FP32_MIN
@taste-software

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@Wesley-Du i use your kernels for my project and this is a good change I think.

@glorysdj
glorysdj requested a review from gc-fu July 16, 2026 05:46
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