Define a prefetchable memory window and allocate virtio BARs from mmio32 instead of mmio64 - #6163
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ilstam wants to merge 3 commits into
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Define a prefetchable memory window and allocate virtio BARs from mmio32 instead of mmio64#6163ilstam wants to merge 3 commits into
ilstam wants to merge 3 commits into
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The virtio-pci capability BAR is a non-prefetchable BAR currently allocated from the [256 GiB, 512 GiB) range managed by the mmio64 allocator. Future patches will add PCIe root ports to the bus topology. Each root port defines its own prefetchable and non-prefetchable memory windows and all resources behind a root port must be within that window. The non-prefetchable memory registers of root ports can only describe memory below 4GiB (there is no restriction for prefetchable memory). Therefore non-prefetchable BARs must be allocated from the mmio32 allocator. Use the mmio32 allocator instead of the mmio64 allocator for virtio-pci non-prefetchable BARs. Signed-off-by: Ilias Stamatis <ilstam@amazon.com>
Firecracker advertises two host bridge memory windows: a 32-bit one below 4 GiB and a 64-bit one at 256 GiB. Both are currently advertised as non-prefetchable. In future commits we will add support for pass-through PCIe devices with prefetchable BARs. Mark the 64-bit MMIO window as prefetchable in preparation for that. Signed-off-by: Ilias Stamatis <ilstam@amazon.com>
PciRoot models the host bridge that sits at 00:00.0. Rename it to PciHostBridge so it is not confused with the PCIe root ports added in subsequent patches. While at it rename PciRootError to PciBusError too. Its variants are about allocating device slots on a bus, not about the host bridge, and "root" would be ambiguous once root ports exist. Signed-off-by: Ilias Stamatis <ilstam@amazon.com>
Codecov Report❌ Patch coverage is Additional details and impacted files@@ Coverage Diff @@
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Files 277 277
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Misses 5252 5252
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