Add wait halt mode for real intermittent-power evaluation

[byeongjee]

Summary

Adds a fourth halt mode, wait, for evaluating milp/rockclimb/schematic under real capacitor power (Otii + R + diode + capacitor). Instead of halting at region boundaries, the board blocks until the supply is recharged to 3.3 V, matching the algorithms' assumption that every region starts with a full capacitor.

• passes/runtime/vcc_wait.c — wait_until_vcc_full(): measures VCC via the ADC12_B battery monitor (AVCC/2 on channel 31) against the internal 2.0 V reference; sleeps in LPM3 between samples, woken every ~10 ms by Timer_A0 on VLO. The reference and ADC are powered down around each sample, so waiting draws only LPM3-level current (~160 nA measured) and does not fight the capacitor's charging current.
• boot_common.inc — HALT_WAIT branch in save_pc_sp_and_halt: checkpoint PC/SP, wait for a full capacitor, then continue into the next region without rebooting (caller-saved registers/SR preserved for RockClimb's post-regalloc call sites). Removes the unused lpm4 mode.
• Boot paths (all three algorithms) — in wait mode, recovery no longer clears __nvm_pc and waits for a full capacitor before resuming, so a power failure during the wait re-enters recovery instead of being misread as a fresh boot; fresh boot waits before any persistent write.
• park_if_done — debug builds park in LPM4 at boot once __nvm_done is set, freezing NVM results/counters so mspdebug readback (which resets the board onto FET power) can no longer re-execute the program and contaminate them.
• Python toolchain — --halt-mode wait plumbed through compile/bench/verify; vcc_wait.c compiled and linked automatically; HALT_MODES moved to compile/common.py as the single source of truth.

Validation (MSP430FR5994 LaunchPad + Otii)

• Continuous power: wait-mode bitcount matches the swbor reference exactly (__nvm_result 0xcc9e, cnt_boundary 37,407).
• Otii 3.0 V: parks at the fresh-boot wait indefinitely at ~160 nA with 10 ms sample blips; raising to 3.6 V releases it and the benchmark completes on Otii power alone (Saleae end-pulse observed).
• Post-completion NVM readback is bit-identical across repeated mspdebug sessions (park guard verified).
• Setup note discovered during validation: during externally powered runs the eZ-FET must be isolated (3V3/RST/TST jumpers pulled) — a backfed, half-alive eZ-FET kills the target mid-run via the SBW lines.

Test plan

• All 139 unit tests pass (uv run --extra test pytest tests/ -m unit)
• Boot files assemble in all halt mode × DEVICE_DEBUG combinations
• End-to-end compile+link for milp/rockclimb/schematic/schematicO3 in wait mode
• On-device validation as described above