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!drivers/pwm: remove PWM_MULTICHAN option #18864

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!drivers/pwm: remove PWM_MULTICHAN option #18864

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5 changes: 0 additions & 5 deletions arch/arm/Kconfig
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Original file line number Diff line number Diff line change
Expand Up @@ -319,7 +319,6 @@ config ARCH_CHIP_NRF52
#select ARM_HAVE_MPU_UNIFIED
select ARCH_HAVE_SPI_BITORDER
select ARCH_HAVE_FPU
select ARCH_HAVE_PWM_MULTICHAN
select ARCH_HAVE_SERIAL_TERMIOS
select ARCH_DMA_NO_FLASH_TRANSFER
---help---
Expand All @@ -328,7 +327,6 @@ config ARCH_CHIP_NRF52
config ARCH_CHIP_NRF53
bool "Nordic nRF53"
select ARCH_CORTEXM33
select ARCH_HAVE_PWM_MULTICHAN
select ARCH_DMA_NO_FLASH_TRANSFER
depends on EXPERIMENTAL
---help---
Expand All @@ -337,7 +335,6 @@ config ARCH_CHIP_NRF53
config ARCH_CHIP_NRF91
bool "Nordic nRF91"
select ARCH_CORTEXM33
select ARCH_HAVE_PWM_MULTICHAN
select ARCH_HAVE_TRUSTZONE
select ARCH_HAVE_TICKLESS
select ARCH_DMA_NO_FLASH_TRANSFER
Expand Down Expand Up @@ -373,7 +370,6 @@ config ARCH_CHIP_RP2040
select ARCH_HAVE_MULTICPU
select ARCH_HAVE_I2CRESET
select ARM_HAVE_WFE_SEV
select ARCH_HAVE_PWM_MULTICHAN
select ARCH_BOARD_COMMON
select ARCH_HAVE_CUSTOM_TESTSET
---help---
Expand All @@ -389,7 +385,6 @@ config ARCH_CHIP_RP23XX
select ARM_HAVE_DSP
select ARCH_HAVE_FPU
select ARCH_HAVE_CUSTOM_TESTSET
select ARCH_HAVE_PWM_MULTICHAN
select ARCH_BOARD_COMMON
---help---
Raspberry Pi RP23XX architectures (ARM dual Cortex-M33 or RISC-V).
Expand Down
1 change: 0 additions & 1 deletion arch/arm/src/at32/Kconfig
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Original file line number Diff line number Diff line change
Expand Up @@ -3651,7 +3651,6 @@ config AT32_PWM_MULTICHAN
bool "PWM Multiple Output Channels"
default n
depends on AT32_PWM
select ARCH_HAVE_PWM_MULTICHAN
---help---
Specifies that the PWM driver supports multiple output
channels per timer.
Expand Down
56 changes: 14 additions & 42 deletions arch/arm/src/at32/at32_pwm.c
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Original file line number Diff line number Diff line change
Expand Up @@ -2168,11 +2168,6 @@ static int pwm_duty_update(struct pwm_lowerhalf_s *dev, uint8_t channel,
pwminfo("TIM%u channel: %u duty: %08" PRIx32 "\n",
priv->timid, channel, duty);

#ifndef CONFIG_PWM_MULTICHAN
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@linguini1 linguini1 May 12, 2026

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Maybe we can change this to #if CONFIG_PWM_NCHAN == 1

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@raiden00pl raiden00pl May 12, 2026

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optimizing such a simple case is a matter for the compiler. when CONFIG_PWM_NCHANNELS=1 this code should be easy to optimise:

      for (i = 0; ret == OK && i < CONFIG_PWM_NCHANNELS; i++)
        {
          /* Break the loop if all following channels are not configured */

          if (info->channels[i].channel == -1)
            {
              break;
            }

          /* Set output if channel configured */

          if (info->channels[i].channel != 0)
            {
              ret = pwm_duty_update(dev, info->channels[i].channel,
                                    info->channels[i].duty);
            }
        }

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@linguini1 linguini1 May 12, 2026

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Sounds good!

DEBUGASSERT(channel == priv->channels[0].channel);
DEBUGASSERT(duty >= 0 && duty < uitoub16(100));
#endif

/* Get the reload values */

reload = pwm_arr_get(dev);
Expand Down Expand Up @@ -3219,13 +3214,13 @@ static int pwm_pulsecount_timer(struct pwm_lowerhalf_s *dev,
pwminfo("TIM%u channel: %u frequency: %" PRIx32 " duty: %08" PRIx32
" count: %" PRIx32 "\n",
priv->timid, priv->channels[0].channel, info->frequency,
info->duty, info->count);
info->channels[0].duty, info->channels[0].count);

DEBUGASSERT(info->frequency > 0);

/* Channel specific setup */

duty = info->duty;
duty = info->channels[0].duty;
channel = priv->channels[0].channel;

/* Disable all interrupts and DMA requests, clear all pending status */
Expand Down Expand Up @@ -3254,7 +3249,7 @@ static int pwm_pulsecount_timer(struct pwm_lowerhalf_s *dev,
* assured us that the count value is within range).
*/

if (info->count > 0)
if (info->channels[0].count > 0)
{
/* Save the remaining count and the number of counts that will have
* elapsed on the first interrupt.
Expand All @@ -3265,7 +3260,7 @@ static int pwm_pulsecount_timer(struct pwm_lowerhalf_s *dev,
* value.
*/

priv->prev = pwm_pulsecount(info->count);
priv->prev = pwm_pulsecount(info->channels[0].count);
pwm_rcr_update(dev, priv->prev - 1);

/* Generate an update event to reload the prescaler. This should
Expand All @@ -3278,8 +3273,8 @@ static int pwm_pulsecount_timer(struct pwm_lowerhalf_s *dev,
* update event.
*/

priv->count = info->count;
priv->curr = pwm_pulsecount(info->count - priv->prev);
priv->count = info->channels[0].count;
priv->curr = pwm_pulsecount(info->channels[0].count - priv->prev);
pwm_rcr_update(dev, priv->curr - 1);
}

Expand Down Expand Up @@ -3308,12 +3303,13 @@ static int pwm_pulsecount_timer(struct pwm_lowerhalf_s *dev,
goto errout;
}

/* Setup update interrupt. If info->count is > 0, then we can be
* assured that pwm_pulsecount_start() has already verified: (1) that this
* is an advanced timer, and that (2) the repetition count is within range.
/* Setup update interrupt. If info->channels[0].count is > 0, then we can
* be assured that pwm_pulsecount_start() has already verified: (1) that
* this is an advanced timer, and that (2) the repetition count is within
* range.
*/

if (info->count > 0)
if (info->channels[0].count > 0)
{
/* Clear all pending interrupts and enable the update interrupt. */

Expand Down Expand Up @@ -3467,16 +3463,11 @@ static int pwm_duty_channels_update(struct pwm_lowerhalf_s *dev,
uint8_t channel = 0;
ub16_t duty = 0;
int ret = OK;
#ifdef CONFIG_PWM_MULTICHAN
int i = 0;
int j = 0;
#endif

#ifdef CONFIG_PWM_MULTICHAN
for (i = 0; i < CONFIG_PWM_NCHANNELS; i++)
#endif
{
#ifdef CONFIG_PWM_MULTICHAN
/* Break the loop if all following channels are not configured */

if (info->channels[i].channel == -1)
Expand Down Expand Up @@ -3509,10 +3500,6 @@ static int pwm_duty_channels_update(struct pwm_lowerhalf_s *dev,
ret = -EINVAL;
goto errout;
}
#else
duty = info->duty;
channel = priv->channels[0].channel;
#endif

/* Update duty cycle */

Expand All @@ -3521,9 +3508,7 @@ static int pwm_duty_channels_update(struct pwm_lowerhalf_s *dev,
{
goto errout;
}
#ifdef CONFIG_PWM_MULTICHAN
}
#endif
}

errout:
Expand Down Expand Up @@ -3554,19 +3539,10 @@ static int pwm_timer(struct pwm_lowerhalf_s *dev,

DEBUGASSERT(priv != NULL && info != NULL);

#if defined(CONFIG_PWM_MULTICHAN)
pwminfo("TIM%u frequency: %" PRIu32 "\n",
priv->timid, info->frequency);
#else
pwminfo("TIM%u channel: %u frequency: %" PRIu32 " duty: %08" PRIx32 "\n",
priv->timid, priv->channels[0].channel,
info->frequency, info->duty);
#endif

DEBUGASSERT(info->frequency > 0);
#ifndef CONFIG_PWM_MULTICHAN
DEBUGASSERT(info->duty >= 0 && info->duty < uitoub16(100));
#endif

/* TODO: what if we have pwm running and we want disable some channels ? */

Expand Down Expand Up @@ -4172,14 +4148,14 @@ static int pwm_start_pulsecount(struct pwm_lowerhalf_s *dev,

/* Generate an indefinite number of pulses */

if (info->count == 0)
if (info->channels[0].count == 0)
{
return pwm_start(dev, info);
}

/* Check if a pulsecount has been selected */

if (info->count > 0)
if (info->channels[0].count > 0)
{
/* Only the advanced timers (TIM1,8 can support the pulse counting)
* REVISIT: verify if TIMTYPE_COUNTUP16_N works with it
Expand All @@ -4188,7 +4164,7 @@ static int pwm_start_pulsecount(struct pwm_lowerhalf_s *dev,
if (priv->timtype != TIMTYPE_ADVANCED)
{
pwmerr("ERROR: TIM%u cannot support pulse count: %" PRIx32 "\n",
priv->timid, info->count);
priv->timid, info->channels[0].count);
return -EPERM;
}
}
Expand All @@ -4213,7 +4189,6 @@ static int pwm_start(struct pwm_lowerhalf_s *dev,

if (info->frequency == priv->frequency)
{
#ifdef CONFIG_PWM_MULTICHAN
int i;

for (i = 0; ret == OK && i < CONFIG_PWM_NCHANNELS; i++)
Expand All @@ -4233,9 +4208,6 @@ static int pwm_start(struct pwm_lowerhalf_s *dev,
info->channels[i].duty);
}
}
#else
ret = pwm_duty_update(dev, priv->channels[0].channel, info->duty);
#endif /* CONFIG_PWM_MULTICHAN */
}
else
{
Expand Down
2 changes: 1 addition & 1 deletion arch/arm/src/at32/at32_pwm.h
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Original file line number Diff line number Diff line change
Expand Up @@ -358,7 +358,7 @@
PWM_TIM20_CHANNEL3 + PWM_TIM20_CHANNEL4 + \
PWM_TIM20_CHANNEL5 + PWM_TIM20_CHANNEL6)

#else /* !CONFIG_PWM_MULTICHAN */
#else /* !CONFIG_AT32_PWM_MULTICHAN */

/* For each timer that is enabled for PWM usage, we need the following
* additional configuration settings:
Expand Down
7 changes: 4 additions & 3 deletions arch/arm/src/cxd56xx/cxd56_pwm.c
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Original file line number Diff line number Diff line change
Expand Up @@ -394,13 +394,13 @@ static int pwm_start(struct pwm_lowerhalf_s *dev,
uint32_t phase;
int ret;

if (info->duty <= 0)
if (info->channels[0].duty <= 0)
{
/* Output low level if duty cycle is almost 0% */

PWM_REG(priv->ch)->EN = 0x0;
}
else if (info->duty >= 65536)
else if (info->channels[0].duty >= 65536)
{
/* Output high level if duty cycle is almost 100% */

Expand All @@ -409,7 +409,8 @@ static int pwm_start(struct pwm_lowerhalf_s *dev,
}
else
{
ret = convert_freq2period(info->frequency, info->duty, &param, &phase);
ret = convert_freq2period(info->frequency, info->channels[0].duty,
&param, &phase);
if (ret < 0)
{
return -EINVAL;
Expand Down
12 changes: 7 additions & 5 deletions arch/arm/src/efm32/efm32_pwm.c
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Original file line number Diff line number Diff line change
Expand Up @@ -360,13 +360,14 @@ static int pwm_timer(struct efm32_pwmtimer_s *priv,
#ifdef CONFIG_PWM_PULSECOUNT
pwminfo("TIMER%d channel: %d frequency: %d duty: %08x count: %d\n",
priv->timid, priv->channel, info->frequency,
info->duty, info->count);
info->channels[0].duty, info->channels[0].count);
#else
pwminfo("TIMER%d channel: %d frequency: %d duty: %08x\n",
priv->timid, priv->channel, info->frequency, info->duty);
priv->timid, priv->channel, info->frequency,
info->channels[0].duty);
#endif
DEBUGASSERT(info->frequency > 0 && info->duty >= 0 &&
info->duty < uitoub16(100));
DEBUGASSERT(info->frequency > 0 && info->channels[0].duty >= 0 &&
info->channels[0].duty < uitoub16(100));

efm32_timer_reset(priv->base);

Expand Down Expand Up @@ -403,7 +404,8 @@ static int pwm_timer(struct efm32_pwmtimer_s *priv,

pwm_putreg(priv, EFM32_TIMER_ROUTE_OFFSET, regval);

regval = (info->duty * pwm_getreg(priv, EFM32_TIMER_TOP_OFFSET)) >> 16;
regval = (info->channels[0].duty *
pwm_getreg(priv, EFM32_TIMER_TOP_OFFSET)) >> 16;
pwm_putreg(priv, cc_offet + EFM32_TIMER_CC_CCV_OFFSET, regval);

/* pwm_putreg(priv, cc_offet + EFM32_TIMER_CC_CCVB_OFFSET, regval); */
Expand Down
20 changes: 10 additions & 10 deletions arch/arm/src/ht32f491x3/Kconfig
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Expand Up @@ -63,7 +63,7 @@ config HT32F491X3_TMR1
config HT32F491X3_TMR1_PWM
bool "TMR1 PWM output"
default n
depends on HT32F491X3_TMR1 && PWM && !PWM_MULTICHAN
Comment thread
raiden00pl marked this conversation as resolved.
depends on HT32F491X3_TMR1 && PWM && PWM_NCHANNELS = 1
---help---
Enable lower-half PWM support on TMR1.

Expand All @@ -85,7 +85,7 @@ config HT32F491X3_TMR2
config HT32F491X3_TMR2_PWM
bool "TMR2 PWM output"
default n
depends on HT32F491X3_TMR2 && PWM && !PWM_MULTICHAN
depends on HT32F491X3_TMR2 && PWM && PWM_NCHANNELS = 1
---help---
Enable lower-half PWM support on TMR2.

Expand All @@ -107,7 +107,7 @@ config HT32F491X3_TMR3
config HT32F491X3_TMR3_PWM
bool "TMR3 PWM output"
default n
depends on HT32F491X3_TMR3 && PWM && !PWM_MULTICHAN
depends on HT32F491X3_TMR3 && PWM && PWM_NCHANNELS = 1
---help---
Enable lower-half PWM support on TMR3.

Expand All @@ -129,7 +129,7 @@ config HT32F491X3_TMR4
config HT32F491X3_TMR4_PWM
bool "TMR4 PWM output"
default n
depends on HT32F491X3_TMR4 && PWM && !PWM_MULTICHAN
depends on HT32F491X3_TMR4 && PWM && PWM_NCHANNELS = 1
---help---
Enable lower-half PWM support on TMR4.

Expand Down Expand Up @@ -165,7 +165,7 @@ config HT32F491X3_TMR9
config HT32F491X3_TMR9_PWM
bool "TMR9 PWM output"
default n
depends on HT32F491X3_TMR9 && PWM && !PWM_MULTICHAN
depends on HT32F491X3_TMR9 && PWM && PWM_NCHANNELS = 1
---help---
Enable lower-half PWM support on TMR9.

Expand All @@ -187,7 +187,7 @@ config HT32F491X3_TMR10
config HT32F491X3_TMR10_PWM
bool "TMR10 PWM output"
default n
depends on HT32F491X3_TMR10 && PWM && !PWM_MULTICHAN
depends on HT32F491X3_TMR10 && PWM && PWM_NCHANNELS = 1
---help---
Enable lower-half PWM support on TMR10.

Expand All @@ -208,7 +208,7 @@ config HT32F491X3_TMR11
config HT32F491X3_TMR11_PWM
bool "TMR11 PWM output"
default n
depends on HT32F491X3_TMR11 && PWM && !PWM_MULTICHAN
depends on HT32F491X3_TMR11 && PWM && PWM_NCHANNELS = 1
---help---
Enable lower-half PWM support on TMR11.

Expand All @@ -229,7 +229,7 @@ config HT32F491X3_TMR12
config HT32F491X3_TMR12_PWM
bool "TMR12 PWM output"
default n
depends on HT32F491X3_TMR12 && PWM && !PWM_MULTICHAN
depends on HT32F491X3_TMR12 && PWM && PWM_NCHANNELS = 1
---help---
Enable lower-half PWM support on TMR12.

Expand All @@ -251,7 +251,7 @@ config HT32F491X3_TMR13
config HT32F491X3_TMR13_PWM
bool "TMR13 PWM output"
default n
depends on HT32F491X3_TMR13 && PWM && !PWM_MULTICHAN
depends on HT32F491X3_TMR13 && PWM && PWM_NCHANNELS = 1
---help---
Enable lower-half PWM support on TMR13.

Expand All @@ -272,7 +272,7 @@ config HT32F491X3_TMR14
config HT32F491X3_TMR14_PWM
bool "TMR14 PWM output"
default n
depends on HT32F491X3_TMR14 && PWM && !PWM_MULTICHAN
depends on HT32F491X3_TMR14 && PWM && PWM_NCHANNELS = 1
---help---
Enable lower-half PWM support on TMR14.

Expand Down
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