Improve SGEMM, DGEMM, CGEMM and ZGEMM kernels for RISC-V ZVL128B and ZVL256B#5561

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riseproject-dev:riscv-rvv_vlv

Commits on Dec 5, 2025

Add new SGEMM/DGEMM kernels for RISC-V ZVL128B/ZVL256B architectures
Kwok Cheung Yeung
committed
Add improved CGEMM and ZGEMM kernels for the RISC-V ZVL128B and ZVL256B architectures
Kwok Cheung Yeung
committed
Replace original RISC-V ZVL kernels with new kernels
Kwok Cheung Yeung
committed
Allow TRMM unroll sizes to be set independently from the GEMM unroll sizes for RISC-V
Kwok Cheung Yeung
committed
Change DGEMM tiling size from 8x8 to 4x8 for the RISC-V ZVL256B architecture
Kwok Cheung Yeung
committed
Make new RISC-V kernels work with DYNAMIC_ARCH enabled
Kwok Cheung Yeung
committed