Rename project_num_t to map_to_sized_type_t

AntoinePrv · AntoinePrv · commit acfbe8c1a323 · 2026-04-28T09:50:01.000+02:00
diff --git a/include/xsimd/arch/xsimd_neon.hpp b/include/xsimd/arch/xsimd_neon.hpp
@@ -238,7 +238,7 @@ namespace xsimd
         XSIMD_INLINE batch<R, A> bitwise_cast(batch<T, A> const& arg, batch<R, A> const&, requires_arch<neon>) noexcept
         {
             using src_register_type = typename batch<T, A>::register_type;
-            return wrap::x_vreinterpretq<project_num_t<R>, project_num_t<T>>(src_register_type(arg));
+            return wrap::x_vreinterpretq<map_to_sized_type_t<R>, map_to_sized_type_t<T>>(src_register_type(arg));
         }
 
         /*************
@@ -826,7 +826,7 @@ namespace xsimd
         XSIMD_INLINE batch<T, A> add(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<neon>) noexcept
         {
             using register_type = typename batch<T, A>::register_type;
-            return wrap::x_vaddq<project_num_t<T>>(register_type(lhs), register_type(rhs));
+            return wrap::x_vaddq<map_to_sized_type_t<T>>(register_type(lhs), register_type(rhs));
         }
 
         /*******
@@ -848,7 +848,7 @@ namespace xsimd
         XSIMD_INLINE batch<T, A> avg(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<neon>) noexcept
         {
             using register_type = typename batch<T, A>::register_type;
-            return wrap::x_vhaddq<project_num_t<T>>(register_type(lhs), register_type(rhs));
+            return wrap::x_vhaddq<map_to_sized_type_t<T>>(register_type(lhs), register_type(rhs));
         }
 
         /********
@@ -870,7 +870,7 @@ namespace xsimd
         XSIMD_INLINE batch<T, A> avgr(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<neon>) noexcept
         {
             using register_type = typename batch<T, A>::register_type;
-            return wrap::x_vrhaddq<project_num_t<T>>(register_type(lhs), register_type(rhs));
+            return wrap::x_vrhaddq<map_to_sized_type_t<T>>(register_type(lhs), register_type(rhs));
         }
 
         /********
@@ -904,7 +904,7 @@ namespace xsimd
         XSIMD_INLINE batch<T, A> sadd(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<neon>) noexcept
         {
             using register_type = typename batch<T, A>::register_type;
-            return wrap::x_vqaddq<project_num_t<T>>(register_type(lhs), register_type(rhs));
+            return wrap::x_vqaddq<map_to_sized_type_t<T>>(register_type(lhs), register_type(rhs));
         }
 
         /*******
@@ -938,7 +938,7 @@ namespace xsimd
         XSIMD_INLINE batch<T, A> sub(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<neon>) noexcept
         {
             using register_type = typename batch<T, A>::register_type;
-            return wrap::x_vsubq<project_num_t<T>>(register_type(lhs), register_type(rhs));
+            return wrap::x_vsubq<map_to_sized_type_t<T>>(register_type(lhs), register_type(rhs));
         }
 
         /********
@@ -972,7 +972,7 @@ namespace xsimd
         XSIMD_INLINE batch<T, A> ssub(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<neon>) noexcept
         {
             using register_type = typename batch<T, A>::register_type;
-            return wrap::x_vqsubq<project_num_t<T>>(register_type(lhs), register_type(rhs));
+            return wrap::x_vqsubq<map_to_sized_type_t<T>>(register_type(lhs), register_type(rhs));
         }
 
         /*******
@@ -1002,7 +1002,7 @@ namespace xsimd
         XSIMD_INLINE batch<T, A> mul(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<neon>) noexcept
         {
             using register_type = typename batch<T, A>::register_type;
-            return wrap::x_vmulq<project_num_t<T>>(register_type(lhs), register_type(rhs));
+            return wrap::x_vmulq<map_to_sized_type_t<T>>(register_type(lhs), register_type(rhs));
         }
 
         /*******
@@ -1067,7 +1067,7 @@ namespace xsimd
         XSIMD_INLINE batch_bool<T, A> eq(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<neon>) noexcept
         {
             using register_type = typename batch<T, A>::register_type;
-            return wrap::x_vceqq<project_num_t<T>>(register_type(lhs), register_type(rhs));
+            return wrap::x_vceqq<map_to_sized_type_t<T>>(register_type(lhs), register_type(rhs));
         }
 
         template <class A, class T, detail::exclude_int64_neon_t<T> = 0>
@@ -1160,7 +1160,7 @@ namespace xsimd
         XSIMD_INLINE batch_bool<T, A> lt(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<neon>) noexcept
         {
             using register_type = typename batch<T, A>::register_type;
-            return wrap::x_vcltq<project_num_t<T>>(register_type(lhs), register_type(rhs));
+            return wrap::x_vcltq<map_to_sized_type_t<T>>(register_type(lhs), register_type(rhs));
         }
 
         template <class A, class T, detail::enable_sized_signed_t<T, 8> = 0>
@@ -1205,7 +1205,7 @@ namespace xsimd
         XSIMD_INLINE batch_bool<T, A> le(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<neon>) noexcept
         {
             using register_type = typename batch<T, A>::register_type;
-            return wrap::x_vcleq<project_num_t<T>>(register_type(lhs), register_type(rhs));
+            return wrap::x_vcleq<map_to_sized_type_t<T>>(register_type(lhs), register_type(rhs));
         }
 
         template <class A, class T, detail::enable_sized_integral_t<T, 8> = 0>
@@ -1241,7 +1241,7 @@ namespace xsimd
         XSIMD_INLINE batch_bool<T, A> gt(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<neon>) noexcept
         {
             using register_type = typename batch<T, A>::register_type;
-            return wrap::x_vcgtq<project_num_t<T>>(register_type(lhs), register_type(rhs));
+            return wrap::x_vcgtq<map_to_sized_type_t<T>>(register_type(lhs), register_type(rhs));
         }
 
         template <class A, class T, detail::enable_sized_signed_t<T, 8> = 0>
@@ -1286,7 +1286,7 @@ namespace xsimd
         XSIMD_INLINE batch_bool<T, A> ge(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<neon>) noexcept
         {
             using register_type = typename batch<T, A>::register_type;
-            return wrap::x_vcgeq<project_num_t<T>>(register_type(lhs), register_type(rhs));
+            return wrap::x_vcgeq<map_to_sized_type_t<T>>(register_type(lhs), register_type(rhs));
         }
 
         template <class A, class T, detail::enable_sized_integral_t<T, 8> = 0>
@@ -1341,7 +1341,7 @@ namespace xsimd
         XSIMD_INLINE batch<T, A> bitwise_and(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<neon>) noexcept
         {
             using register_type = typename batch<T, A>::register_type;
-            return wrap::x_vandq<project_num_t<T>>(register_type(lhs), register_type(rhs));
+            return wrap::x_vandq<map_to_sized_type_t<T>>(register_type(lhs), register_type(rhs));
         }
 
         template <class A, class T, detail::enable_neon_type_t<T> = 0>
@@ -1386,7 +1386,7 @@ namespace xsimd
         XSIMD_INLINE batch<T, A> bitwise_or(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<neon>) noexcept
         {
             using register_type = typename batch<T, A>::register_type;
-            return wrap::x_vorrq<project_num_t<T>>(register_type(lhs), register_type(rhs));
+            return wrap::x_vorrq<map_to_sized_type_t<T>>(register_type(lhs), register_type(rhs));
         }
 
         template <class A, class T, detail::enable_neon_type_t<T> = 0>
@@ -1431,7 +1431,7 @@ namespace xsimd
         XSIMD_INLINE batch<T, A> bitwise_xor(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<neon>) noexcept
         {
             using register_type = typename batch<T, A>::register_type;
-            return wrap::x_veorq<project_num_t<T>>(register_type(lhs), register_type(rhs));
+            return wrap::x_veorq<map_to_sized_type_t<T>>(register_type(lhs), register_type(rhs));
         }
 
         template <class A, class T, detail::enable_neon_type_t<T> = 0>
@@ -1491,7 +1491,7 @@ namespace xsimd
         XSIMD_INLINE batch<T, A> bitwise_not(batch<T, A> const& arg, requires_arch<neon>) noexcept
         {
             using register_type = typename batch<T, A>::register_type;
-            return wrap::x_vmvnq<project_num_t<T>>(register_type(arg));
+            return wrap::x_vmvnq<map_to_sized_type_t<T>>(register_type(arg));
         }
 
         template <class A, class T, detail::enable_neon_type_t<T> = 0>
@@ -1535,7 +1535,7 @@ namespace xsimd
         XSIMD_INLINE batch<T, A> bitwise_andnot(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<neon>) noexcept
         {
             using register_type = typename batch<T, A>::register_type;
-            return wrap::x_vbicq<project_num_t<T>>(register_type(lhs), register_type(rhs));
+            return wrap::x_vbicq<map_to_sized_type_t<T>>(register_type(lhs), register_type(rhs));
         }
 
         template <class A, class T, detail::enable_neon_type_t<T> = 0>
@@ -1572,7 +1572,7 @@ namespace xsimd
         XSIMD_INLINE batch<T, A> min(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<neon>) noexcept
         {
             using register_type = typename batch<T, A>::register_type;
-            return wrap::x_vminq<project_num_t<T>>(register_type(lhs), register_type(rhs));
+            return wrap::x_vminq<map_to_sized_type_t<T>>(register_type(lhs), register_type(rhs));
         }
 
         template <class A, class T, detail::enable_sized_integral_t<T, 8> = 0>
@@ -1608,7 +1608,7 @@ namespace xsimd
         XSIMD_INLINE batch<T, A> max(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<neon>) noexcept
         {
             using register_type = typename batch<T, A>::register_type;
-            return wrap::x_vmaxq<project_num_t<T>>(register_type(lhs), register_type(rhs));
+            return wrap::x_vmaxq<map_to_sized_type_t<T>>(register_type(lhs), register_type(rhs));
         }
 
         template <class A, class T, detail::enable_sized_integral_t<T, 8> = 0>
@@ -1644,7 +1644,7 @@ namespace xsimd
         XSIMD_INLINE batch<T, A> abs(batch<T, A> const& arg, requires_arch<neon>) noexcept
         {
             using register_type = typename batch<T, A>::register_type;
-            return wrap::x_vabsq<project_num_t<T>>(register_type(arg));
+            return wrap::x_vabsq<map_to_sized_type_t<T>>(register_type(arg));
         }
 
         /********
@@ -1992,7 +1992,7 @@ namespace xsimd
         {
             using bool_register_type = typename batch_bool<T, A>::register_type;
             using register_type = typename batch<T, A>::register_type;
-            return wrap::x_vbslq<project_num_t<T>>(bool_register_type(cond), register_type(a), register_type(b));
+            return wrap::x_vbslq<map_to_sized_type_t<T>>(bool_register_type(cond), register_type(a), register_type(b));
         }
 
         template <class A, class T, bool... b, detail::enable_neon_type_t<T> = 0>
@@ -3120,7 +3120,7 @@ namespace xsimd
         XSIMD_INLINE batch<T, A> rotate_left(batch<T, A> const& a, requires_arch<neon>) noexcept
         {
             using register_type = typename batch<T, A>::register_type;
-            return wrap::x_rotate_left<N, project_num_t<T>>(register_type(a), register_type(a));
+            return wrap::x_rotate_left<N, map_to_sized_type_t<T>>(register_type(a), register_type(a));
         }
     }
 
diff --git a/include/xsimd/arch/xsimd_neon64.hpp b/include/xsimd/arch/xsimd_neon64.hpp
@@ -1299,14 +1299,14 @@ namespace xsimd
         XSIMD_INLINE batch<double, A> bitwise_cast(batch<T, A> const& arg, batch<double, A> const&, requires_arch<neon64>) noexcept
         {
             using register_type = typename batch<T, A>::register_type;
-            return wrap::x_vreinterpretq<double, project_num_t<T>>(register_type(arg));
+            return wrap::x_vreinterpretq<double, map_to_sized_type_t<T>>(register_type(arg));
         }
 
         template <class A, class R>
         XSIMD_INLINE batch<R, A> bitwise_cast(batch<double, A> const& arg, batch<R, A> const&, requires_arch<neon64>) noexcept
         {
             using src_register_type = typename batch<double, A>::register_type;
-            return wrap::x_vreinterpretq<project_num_t<R>, double>(src_register_type(arg));
+            return wrap::x_vreinterpretq<map_to_sized_type_t<R>, double>(src_register_type(arg));
         }
 
         template <class A>
diff --git a/include/xsimd/arch/xsimd_rvv.hpp b/include/xsimd/arch/xsimd_rvv.hpp
@@ -388,7 +388,7 @@ namespace xsimd
                 // A bit of a dance, here, because rvvmv_splat has no other
                 // argument from which to deduce type, and T=char is not
                 // supported.
-                project_num_t<T> arg_not_char(arg);
+                map_to_sized_type_t<T> arg_not_char(arg);
                 const auto splat = rvvmv_splat(arg_not_char);
                 return rvv_reg_t<T, Width>(splat.get_bytes(), types::detail::XSIMD_RVV_BITCAST);
             }
@@ -414,7 +414,7 @@ namespace xsimd
         template <class A, class T, detail::enable_arithmetic_t<T> = 0>
         XSIMD_INLINE batch<T, A> load_aligned(T const* src, convert<T>, requires_arch<rvv>) noexcept
         {
-            return detail_rvv::rvvle(reinterpret_cast<project_num_t<T> const*>(src));
+            return detail_rvv::rvvle(reinterpret_cast<map_to_sized_type_t<T> const*>(src));
         }
 
         template <class A, class T, detail::enable_arithmetic_t<T> = 0>
@@ -491,7 +491,7 @@ namespace xsimd
         template <class A, class T, detail::enable_arithmetic_t<T> = 0>
         XSIMD_INLINE void store_aligned(T* dst, batch<T, A> const& src, requires_arch<rvv>) noexcept
         {
-            detail_rvv::rvvse(reinterpret_cast<project_num_t<T>*>(dst), src);
+            detail_rvv::rvvse(reinterpret_cast<map_to_sized_type_t<T>*>(dst), src);
         }
 
         template <class A, class T, detail::enable_arithmetic_t<T> = 0>
@@ -522,7 +522,7 @@ namespace xsimd
         {
             using UU = as_unsigned_integer_t<U>;
             const auto uindex = detail_rvv::rvv_to_unsigned_batch(index);
-            auto* base = reinterpret_cast<project_num_t<T>*>(dst);
+            auto* base = reinterpret_cast<map_to_sized_type_t<T>*>(dst);
             // or rvvsuxei
             const auto bi = detail_rvv::rvvmul_splat(uindex, sizeof(T));
             detail_rvv::rvvsoxei(base, bi, vals);
@@ -534,7 +534,7 @@ namespace xsimd
         {
             using UU = as_unsigned_integer_t<U>;
             const auto uindex = detail_rvv::rvv_to_unsigned_batch(index);
-            auto const* base = reinterpret_cast<project_num_t<T> const*>(src);
+            auto const* base = reinterpret_cast<map_to_sized_type_t<T> const*>(src);
             // or rvvluxei
             const auto bi = detail_rvv::rvvmul_splat(uindex, sizeof(T));
             return detail_rvv::rvvloxei(base, bi);
diff --git a/include/xsimd/arch/xsimd_sve.hpp b/include/xsimd/arch/xsimd_sve.hpp
@@ -92,7 +92,7 @@ namespace xsimd
         template <class A, class T, detail::enable_arithmetic_t<T> = 0>
         XSIMD_INLINE batch<T, A> load_aligned(T const* src, convert<T>, requires_arch<sve>) noexcept
         {
-            return svld1(detail_sve::ptrue<T>(), reinterpret_cast<project_num_t<T> const*>(src));
+            return svld1(detail_sve::ptrue<T>(), reinterpret_cast<map_to_sized_type_t<T> const*>(src));
         }
 
         template <class A, class T, detail::enable_arithmetic_t<T> = 0>
@@ -105,7 +105,7 @@ namespace xsimd
         template <class A, class T, bool... Values, class Mode, detail::enable_arithmetic_t<T> = 0>
         XSIMD_INLINE batch<T, A> load_masked(T const* mem, batch_bool_constant<float, A, Values...>, Mode, requires_arch<sve>) noexcept
         {
-            return svld1(detail_sve::pmask<Values...>(), reinterpret_cast<project_num_t<T> const*>(mem));
+            return svld1(detail_sve::pmask<Values...>(), reinterpret_cast<map_to_sized_type_t<T> const*>(mem));
         }
 
         // load_complex
@@ -132,7 +132,7 @@ namespace xsimd
         template <class A, class T, detail::enable_arithmetic_t<T> = 0>
         XSIMD_INLINE void store_aligned(T* dst, batch<T, A> const& src, requires_arch<sve>) noexcept
         {
-            svst1(detail_sve::ptrue<T>(), reinterpret_cast<project_num_t<T>*>(dst), src);
+            svst1(detail_sve::ptrue<T>(), reinterpret_cast<map_to_sized_type_t<T>*>(dst), src);
         }
 
         template <class A, class T, detail::enable_arithmetic_t<T> = 0>
diff --git a/include/xsimd/types/xsimd_rvv_register.hpp b/include/xsimd/types/xsimd_rvv_register.hpp
@@ -326,7 +326,7 @@ namespace xsimd
                 operator register_type() const noexcept { return value.get(); }
             };
             template <class T, size_t Width = XSIMD_RVV_BITS>
-            using rvv_reg_t = std::conditional_t<!std::is_void<T>::value, rvv_reg<project_num_t<T>, Width>, void>;
+            using rvv_reg_t = std::conditional_t<!std::is_void<T>::value, rvv_reg<map_to_sized_type_t<T>, Width>, void>;
 
             // And some more of the same stuff for bool types, which have
             // similar problems and similar workarounds.
@@ -388,7 +388,7 @@ namespace xsimd
 
             template <class T, size_t Width = XSIMD_RVV_BITS>
             using rvv_bool_t = std::enable_if_t < !std::is_void<T>::value,
-                  rvv_bool<project_num_t<T>, Width<rvv_width_m1 ? rvv_width_m1 : Width>>;
+                  rvv_bool<map_to_sized_type_t<T>, Width<rvv_width_m1 ? rvv_width_m1 : Width>>;
 
             template <size_t S>
             struct rvv_vector_type_impl;
diff --git a/include/xsimd/utils/xsimd_type_traits.hpp b/include/xsimd/utils/xsimd_type_traits.hpp
@@ -127,7 +127,7 @@ namespace xsimd
      * @tparam T arithmetic type to project from.
      */
     template <typename T>
-    using project_num_t = typename detail::remap_num<T, /* factor= */ 1>::type;
+    using map_to_sized_type_t = typename detail::remap_num<T, /* factor= */ 1>::type;
 
     /**
      * @ingroup type_traits

Original file line number	Diff line number	Diff line change
`@@ -238,7 +238,7 @@ namespace xsimd`
`238`	`238`	`XSIMD_INLINE batch<R, A> bitwise_cast(batch<T, A> const& arg, batch<R, A> const&, requires_arch<neon>) noexcept`
`239`	`239`	`{`
`240`	`240`	`using src_register_type = typename batch<T, A>::register_type;`
`241`		`- return wrap::x_vreinterpretq<project_num_t<R>, project_num_t<T>>(src_register_type(arg));`
	`241`	`+ return wrap::x_vreinterpretq<map_to_sized_type_t<R>, map_to_sized_type_t<T>>(src_register_type(arg));`
`242`	`242`	`}`
`243`	`243`
`244`	`244`	`/*************`
`@@ -826,7 +826,7 @@ namespace xsimd`
`826`	`826`	`XSIMD_INLINE batch<T, A> add(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<neon>) noexcept`
`827`	`827`	`{`
`828`	`828`	`using register_type = typename batch<T, A>::register_type;`
`829`		`- return wrap::x_vaddq<project_num_t<T>>(register_type(lhs), register_type(rhs));`
	`829`	`+ return wrap::x_vaddq<map_to_sized_type_t<T>>(register_type(lhs), register_type(rhs));`
`830`	`830`	`}`
`831`	`831`
`832`	`832`	`/*******`
`@@ -848,7 +848,7 @@ namespace xsimd`
`848`	`848`	`XSIMD_INLINE batch<T, A> avg(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<neon>) noexcept`
`849`	`849`	`{`
`850`	`850`	`using register_type = typename batch<T, A>::register_type;`
`851`		`- return wrap::x_vhaddq<project_num_t<T>>(register_type(lhs), register_type(rhs));`
	`851`	`+ return wrap::x_vhaddq<map_to_sized_type_t<T>>(register_type(lhs), register_type(rhs));`
`852`	`852`	`}`
`853`	`853`
`854`	`854`	`/********`
`@@ -870,7 +870,7 @@ namespace xsimd`
`870`	`870`	`XSIMD_INLINE batch<T, A> avgr(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<neon>) noexcept`
`871`	`871`	`{`
`872`	`872`	`using register_type = typename batch<T, A>::register_type;`
`873`		`- return wrap::x_vrhaddq<project_num_t<T>>(register_type(lhs), register_type(rhs));`
	`873`	`+ return wrap::x_vrhaddq<map_to_sized_type_t<T>>(register_type(lhs), register_type(rhs));`
`874`	`874`	`}`
`875`	`875`
`876`	`876`	`/********`
`@@ -904,7 +904,7 @@ namespace xsimd`
`904`	`904`	`XSIMD_INLINE batch<T, A> sadd(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<neon>) noexcept`
`905`	`905`	`{`
`906`	`906`	`using register_type = typename batch<T, A>::register_type;`
`907`		`- return wrap::x_vqaddq<project_num_t<T>>(register_type(lhs), register_type(rhs));`
	`907`	`+ return wrap::x_vqaddq<map_to_sized_type_t<T>>(register_type(lhs), register_type(rhs));`
`908`	`908`	`}`
`909`	`909`
`910`	`910`	`/*******`
`@@ -938,7 +938,7 @@ namespace xsimd`
`938`	`938`	`XSIMD_INLINE batch<T, A> sub(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<neon>) noexcept`
`939`	`939`	`{`
`940`	`940`	`using register_type = typename batch<T, A>::register_type;`
`941`		`- return wrap::x_vsubq<project_num_t<T>>(register_type(lhs), register_type(rhs));`
	`941`	`+ return wrap::x_vsubq<map_to_sized_type_t<T>>(register_type(lhs), register_type(rhs));`
`942`	`942`	`}`
`943`	`943`
`944`	`944`	`/********`
`@@ -972,7 +972,7 @@ namespace xsimd`
`972`	`972`	`XSIMD_INLINE batch<T, A> ssub(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<neon>) noexcept`
`973`	`973`	`{`
`974`	`974`	`using register_type = typename batch<T, A>::register_type;`
`975`		`- return wrap::x_vqsubq<project_num_t<T>>(register_type(lhs), register_type(rhs));`
	`975`	`+ return wrap::x_vqsubq<map_to_sized_type_t<T>>(register_type(lhs), register_type(rhs));`
`976`	`976`	`}`
`977`	`977`
`978`	`978`	`/*******`
`@@ -1002,7 +1002,7 @@ namespace xsimd`
`1002`	`1002`	`XSIMD_INLINE batch<T, A> mul(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<neon>) noexcept`
`1003`	`1003`	`{`
`1004`	`1004`	`using register_type = typename batch<T, A>::register_type;`
`1005`		`- return wrap::x_vmulq<project_num_t<T>>(register_type(lhs), register_type(rhs));`
	`1005`	`+ return wrap::x_vmulq<map_to_sized_type_t<T>>(register_type(lhs), register_type(rhs));`
`1006`	`1006`	`}`
`1007`	`1007`
`1008`	`1008`	`/*******`
`@@ -1067,7 +1067,7 @@ namespace xsimd`
`1067`	`1067`	`XSIMD_INLINE batch_bool<T, A> eq(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<neon>) noexcept`
`1068`	`1068`	`{`
`1069`	`1069`	`using register_type = typename batch<T, A>::register_type;`
`1070`		`- return wrap::x_vceqq<project_num_t<T>>(register_type(lhs), register_type(rhs));`
	`1070`	`+ return wrap::x_vceqq<map_to_sized_type_t<T>>(register_type(lhs), register_type(rhs));`
`1071`	`1071`	`}`
`1072`	`1072`
`1073`	`1073`	`template <class A, class T, detail::exclude_int64_neon_t<T> = 0>`
`@@ -1160,7 +1160,7 @@ namespace xsimd`
`1160`	`1160`	`XSIMD_INLINE batch_bool<T, A> lt(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<neon>) noexcept`
`1161`	`1161`	`{`
`1162`	`1162`	`using register_type = typename batch<T, A>::register_type;`
`1163`		`- return wrap::x_vcltq<project_num_t<T>>(register_type(lhs), register_type(rhs));`
	`1163`	`+ return wrap::x_vcltq<map_to_sized_type_t<T>>(register_type(lhs), register_type(rhs));`
`1164`	`1164`	`}`
`1165`	`1165`
`1166`	`1166`	`template <class A, class T, detail::enable_sized_signed_t<T, 8> = 0>`
`@@ -1205,7 +1205,7 @@ namespace xsimd`
`1205`	`1205`	`XSIMD_INLINE batch_bool<T, A> le(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<neon>) noexcept`
`1206`	`1206`	`{`
`1207`	`1207`	`using register_type = typename batch<T, A>::register_type;`
`1208`		`- return wrap::x_vcleq<project_num_t<T>>(register_type(lhs), register_type(rhs));`
	`1208`	`+ return wrap::x_vcleq<map_to_sized_type_t<T>>(register_type(lhs), register_type(rhs));`
`1209`	`1209`	`}`
`1210`	`1210`
`1211`	`1211`	`template <class A, class T, detail::enable_sized_integral_t<T, 8> = 0>`
`@@ -1241,7 +1241,7 @@ namespace xsimd`
`1241`	`1241`	`XSIMD_INLINE batch_bool<T, A> gt(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<neon>) noexcept`
`1242`	`1242`	`{`
`1243`	`1243`	`using register_type = typename batch<T, A>::register_type;`
`1244`		`- return wrap::x_vcgtq<project_num_t<T>>(register_type(lhs), register_type(rhs));`
	`1244`	`+ return wrap::x_vcgtq<map_to_sized_type_t<T>>(register_type(lhs), register_type(rhs));`
`1245`	`1245`	`}`
`1246`	`1246`
`1247`	`1247`	`template <class A, class T, detail::enable_sized_signed_t<T, 8> = 0>`
`@@ -1286,7 +1286,7 @@ namespace xsimd`
`1286`	`1286`	`XSIMD_INLINE batch_bool<T, A> ge(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<neon>) noexcept`
`1287`	`1287`	`{`
`1288`	`1288`	`using register_type = typename batch<T, A>::register_type;`
`1289`		`- return wrap::x_vcgeq<project_num_t<T>>(register_type(lhs), register_type(rhs));`
	`1289`	`+ return wrap::x_vcgeq<map_to_sized_type_t<T>>(register_type(lhs), register_type(rhs));`
`1290`	`1290`	`}`
`1291`	`1291`
`1292`	`1292`	`template <class A, class T, detail::enable_sized_integral_t<T, 8> = 0>`
`@@ -1341,7 +1341,7 @@ namespace xsimd`
`1341`	`1341`	`XSIMD_INLINE batch<T, A> bitwise_and(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<neon>) noexcept`
`1342`	`1342`	`{`
`1343`	`1343`	`using register_type = typename batch<T, A>::register_type;`
`1344`		`- return wrap::x_vandq<project_num_t<T>>(register_type(lhs), register_type(rhs));`
	`1344`	`+ return wrap::x_vandq<map_to_sized_type_t<T>>(register_type(lhs), register_type(rhs));`
`1345`	`1345`	`}`
`1346`	`1346`
`1347`	`1347`	`template <class A, class T, detail::enable_neon_type_t<T> = 0>`
`@@ -1386,7 +1386,7 @@ namespace xsimd`
`1386`	`1386`	`XSIMD_INLINE batch<T, A> bitwise_or(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<neon>) noexcept`
`1387`	`1387`	`{`
`1388`	`1388`	`using register_type = typename batch<T, A>::register_type;`
`1389`		`- return wrap::x_vorrq<project_num_t<T>>(register_type(lhs), register_type(rhs));`
	`1389`	`+ return wrap::x_vorrq<map_to_sized_type_t<T>>(register_type(lhs), register_type(rhs));`
`1390`	`1390`	`}`
`1391`	`1391`
`1392`	`1392`	`template <class A, class T, detail::enable_neon_type_t<T> = 0>`
`@@ -1431,7 +1431,7 @@ namespace xsimd`
`1431`	`1431`	`XSIMD_INLINE batch<T, A> bitwise_xor(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<neon>) noexcept`
`1432`	`1432`	`{`
`1433`	`1433`	`using register_type = typename batch<T, A>::register_type;`
`1434`		`- return wrap::x_veorq<project_num_t<T>>(register_type(lhs), register_type(rhs));`
	`1434`	`+ return wrap::x_veorq<map_to_sized_type_t<T>>(register_type(lhs), register_type(rhs));`
`1435`	`1435`	`}`
`1436`	`1436`
`1437`	`1437`	`template <class A, class T, detail::enable_neon_type_t<T> = 0>`
`@@ -1491,7 +1491,7 @@ namespace xsimd`
`1491`	`1491`	`XSIMD_INLINE batch<T, A> bitwise_not(batch<T, A> const& arg, requires_arch<neon>) noexcept`
`1492`	`1492`	`{`
`1493`	`1493`	`using register_type = typename batch<T, A>::register_type;`
`1494`		`- return wrap::x_vmvnq<project_num_t<T>>(register_type(arg));`
	`1494`	`+ return wrap::x_vmvnq<map_to_sized_type_t<T>>(register_type(arg));`
`1495`	`1495`	`}`
`1496`	`1496`
`1497`	`1497`	`template <class A, class T, detail::enable_neon_type_t<T> = 0>`
`@@ -1535,7 +1535,7 @@ namespace xsimd`
`1535`	`1535`	`XSIMD_INLINE batch<T, A> bitwise_andnot(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<neon>) noexcept`
`1536`	`1536`	`{`
`1537`	`1537`	`using register_type = typename batch<T, A>::register_type;`
`1538`		`- return wrap::x_vbicq<project_num_t<T>>(register_type(lhs), register_type(rhs));`
	`1538`	`+ return wrap::x_vbicq<map_to_sized_type_t<T>>(register_type(lhs), register_type(rhs));`
`1539`	`1539`	`}`
`1540`	`1540`
`1541`	`1541`	`template <class A, class T, detail::enable_neon_type_t<T> = 0>`
`@@ -1572,7 +1572,7 @@ namespace xsimd`
`1572`	`1572`	`XSIMD_INLINE batch<T, A> min(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<neon>) noexcept`
`1573`	`1573`	`{`
`1574`	`1574`	`using register_type = typename batch<T, A>::register_type;`
`1575`		`- return wrap::x_vminq<project_num_t<T>>(register_type(lhs), register_type(rhs));`
	`1575`	`+ return wrap::x_vminq<map_to_sized_type_t<T>>(register_type(lhs), register_type(rhs));`
`1576`	`1576`	`}`
`1577`	`1577`
`1578`	`1578`	`template <class A, class T, detail::enable_sized_integral_t<T, 8> = 0>`
`@@ -1608,7 +1608,7 @@ namespace xsimd`
`1608`	`1608`	`XSIMD_INLINE batch<T, A> max(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<neon>) noexcept`
`1609`	`1609`	`{`
`1610`	`1610`	`using register_type = typename batch<T, A>::register_type;`
`1611`		`- return wrap::x_vmaxq<project_num_t<T>>(register_type(lhs), register_type(rhs));`
	`1611`	`+ return wrap::x_vmaxq<map_to_sized_type_t<T>>(register_type(lhs), register_type(rhs));`
`1612`	`1612`	`}`
`1613`	`1613`
`1614`	`1614`	`template <class A, class T, detail::enable_sized_integral_t<T, 8> = 0>`
`@@ -1644,7 +1644,7 @@ namespace xsimd`
`1644`	`1644`	`XSIMD_INLINE batch<T, A> abs(batch<T, A> const& arg, requires_arch<neon>) noexcept`
`1645`	`1645`	`{`
`1646`	`1646`	`using register_type = typename batch<T, A>::register_type;`
`1647`		`- return wrap::x_vabsq<project_num_t<T>>(register_type(arg));`
	`1647`	`+ return wrap::x_vabsq<map_to_sized_type_t<T>>(register_type(arg));`
`1648`	`1648`	`}`
`1649`	`1649`
`1650`	`1650`	`/********`
`@@ -1992,7 +1992,7 @@ namespace xsimd`
`1992`	`1992`	`{`
`1993`	`1993`	`using bool_register_type = typename batch_bool<T, A>::register_type;`
`1994`	`1994`	`using register_type = typename batch<T, A>::register_type;`
`1995`		`- return wrap::x_vbslq<project_num_t<T>>(bool_register_type(cond), register_type(a), register_type(b));`
	`1995`	`+ return wrap::x_vbslq<map_to_sized_type_t<T>>(bool_register_type(cond), register_type(a), register_type(b));`
`1996`	`1996`	`}`
`1997`	`1997`
`1998`	`1998`	`template <class A, class T, bool... b, detail::enable_neon_type_t<T> = 0>`
`@@ -3120,7 +3120,7 @@ namespace xsimd`
`3120`	`3120`	`XSIMD_INLINE batch<T, A> rotate_left(batch<T, A> const& a, requires_arch<neon>) noexcept`
`3121`	`3121`	`{`
`3122`	`3122`	`using register_type = typename batch<T, A>::register_type;`
`3123`		`- return wrap::x_rotate_left<N, project_num_t<T>>(register_type(a), register_type(a));`
	`3123`	`+ return wrap::x_rotate_left<N, map_to_sized_type_t<T>>(register_type(a), register_type(a));`
`3124`	`3124`	`}`
`3125`	`3125`	`}`
`3126`	`3126`
Original file line number	Diff line number	Diff line change
`@@ -1299,14 +1299,14 @@ namespace xsimd`
`1299`	`1299`	`XSIMD_INLINE batch<double, A> bitwise_cast(batch<T, A> const& arg, batch<double, A> const&, requires_arch<neon64>) noexcept`
`1300`	`1300`	`{`
`1301`	`1301`	`using register_type = typename batch<T, A>::register_type;`
`1302`		`- return wrap::x_vreinterpretq<double, project_num_t<T>>(register_type(arg));`
	`1302`	`+ return wrap::x_vreinterpretq<double, map_to_sized_type_t<T>>(register_type(arg));`
`1303`	`1303`	`}`
`1304`	`1304`
`1305`	`1305`	`template <class A, class R>`
`1306`	`1306`	`XSIMD_INLINE batch<R, A> bitwise_cast(batch<double, A> const& arg, batch<R, A> const&, requires_arch<neon64>) noexcept`
`1307`	`1307`	`{`
`1308`	`1308`	`using src_register_type = typename batch<double, A>::register_type;`
`1309`		`- return wrap::x_vreinterpretq<project_num_t<R>, double>(src_register_type(arg));`
	`1309`	`+ return wrap::x_vreinterpretq<map_to_sized_type_t<R>, double>(src_register_type(arg));`
`1310`	`1310`	`}`
`1311`	`1311`
`1312`	`1312`	`template <class A>`
Original file line number	Diff line number	Diff line change
`@@ -388,7 +388,7 @@ namespace xsimd`
`388`	`388`	`// A bit of a dance, here, because rvvmv_splat has no other`
`389`	`389`	`// argument from which to deduce type, and T=char is not`
`390`	`390`	`// supported.`
`391`		`- project_num_t<T> arg_not_char(arg);`
	`391`	`+ map_to_sized_type_t<T> arg_not_char(arg);`
`392`	`392`	`const auto splat = rvvmv_splat(arg_not_char);`
`393`	`393`	`return rvv_reg_t<T, Width>(splat.get_bytes(), types::detail::XSIMD_RVV_BITCAST);`
`394`	`394`	`}`
`@@ -414,7 +414,7 @@ namespace xsimd`
`414`	`414`	`template <class A, class T, detail::enable_arithmetic_t<T> = 0>`
`415`	`415`	`XSIMD_INLINE batch<T, A> load_aligned(T const* src, convert<T>, requires_arch<rvv>) noexcept`
`416`	`416`	`{`
`417`		`- return detail_rvv::rvvle(reinterpret_cast<project_num_t<T> const*>(src));`
	`417`	`+ return detail_rvv::rvvle(reinterpret_cast<map_to_sized_type_t<T> const*>(src));`
`418`	`418`	`}`
`419`	`419`
`420`	`420`	`template <class A, class T, detail::enable_arithmetic_t<T> = 0>`
`@@ -491,7 +491,7 @@ namespace xsimd`
`491`	`491`	`template <class A, class T, detail::enable_arithmetic_t<T> = 0>`
`492`	`492`	`XSIMD_INLINE void store_aligned(T* dst, batch<T, A> const& src, requires_arch<rvv>) noexcept`
`493`	`493`	`{`
`494`		`- detail_rvv::rvvse(reinterpret_cast<project_num_t<T>*>(dst), src);`
	`494`	`+ detail_rvv::rvvse(reinterpret_cast<map_to_sized_type_t<T>*>(dst), src);`
`495`	`495`	`}`
`496`	`496`
`497`	`497`	`template <class A, class T, detail::enable_arithmetic_t<T> = 0>`
`@@ -522,7 +522,7 @@ namespace xsimd`
`522`	`522`	`{`
`523`	`523`	`using UU = as_unsigned_integer_t<U>;`
`524`	`524`	`const auto uindex = detail_rvv::rvv_to_unsigned_batch(index);`
`525`		`- auto* base = reinterpret_cast<project_num_t<T>*>(dst);`
	`525`	`+ auto* base = reinterpret_cast<map_to_sized_type_t<T>*>(dst);`
`526`	`526`	`// or rvvsuxei`
`527`	`527`	`const auto bi = detail_rvv::rvvmul_splat(uindex, sizeof(T));`
`528`	`528`	`detail_rvv::rvvsoxei(base, bi, vals);`
`@@ -534,7 +534,7 @@ namespace xsimd`
`534`	`534`	`{`
`535`	`535`	`using UU = as_unsigned_integer_t<U>;`
`536`	`536`	`const auto uindex = detail_rvv::rvv_to_unsigned_batch(index);`
`537`		`- auto const* base = reinterpret_cast<project_num_t<T> const*>(src);`
	`537`	`+ auto const* base = reinterpret_cast<map_to_sized_type_t<T> const*>(src);`
`538`	`538`	`// or rvvluxei`
`539`	`539`	`const auto bi = detail_rvv::rvvmul_splat(uindex, sizeof(T));`
`540`	`540`	`return detail_rvv::rvvloxei(base, bi);`
Original file line number	Diff line number	Diff line change
`@@ -92,7 +92,7 @@ namespace xsimd`
`92`	`92`	`template <class A, class T, detail::enable_arithmetic_t<T> = 0>`
`93`	`93`	`XSIMD_INLINE batch<T, A> load_aligned(T const* src, convert<T>, requires_arch<sve>) noexcept`
`94`	`94`	`{`
`95`		`- return svld1(detail_sve::ptrue<T>(), reinterpret_cast<project_num_t<T> const*>(src));`
	`95`	`+ return svld1(detail_sve::ptrue<T>(), reinterpret_cast<map_to_sized_type_t<T> const*>(src));`
`96`	`96`	`}`
`97`	`97`
`98`	`98`	`template <class A, class T, detail::enable_arithmetic_t<T> = 0>`
`@@ -105,7 +105,7 @@ namespace xsimd`
`105`	`105`	`template <class A, class T, bool... Values, class Mode, detail::enable_arithmetic_t<T> = 0>`
`106`	`106`	`XSIMD_INLINE batch<T, A> load_masked(T const* mem, batch_bool_constant<float, A, Values...>, Mode, requires_arch<sve>) noexcept`
`107`	`107`	`{`
`108`		`- return svld1(detail_sve::pmask<Values...>(), reinterpret_cast<project_num_t<T> const*>(mem));`
	`108`	`+ return svld1(detail_sve::pmask<Values...>(), reinterpret_cast<map_to_sized_type_t<T> const*>(mem));`
`109`	`109`	`}`
`110`	`110`
`111`	`111`	`// load_complex`
`@@ -132,7 +132,7 @@ namespace xsimd`
`132`	`132`	`template <class A, class T, detail::enable_arithmetic_t<T> = 0>`
`133`	`133`	`XSIMD_INLINE void store_aligned(T* dst, batch<T, A> const& src, requires_arch<sve>) noexcept`
`134`	`134`	`{`
`135`		`- svst1(detail_sve::ptrue<T>(), reinterpret_cast<project_num_t<T>*>(dst), src);`
	`135`	`+ svst1(detail_sve::ptrue<T>(), reinterpret_cast<map_to_sized_type_t<T>*>(dst), src);`
`136`	`136`	`}`
`137`	`137`
`138`	`138`	`template <class A, class T, detail::enable_arithmetic_t<T> = 0>`