Rename project_num_t to map_to_sized_type_t (#1330)

AntoinePrv · web-flow · commit 5141ff0c9215 · 2026-04-28T14:48:20.000Z
diff --git a/include/xsimd/arch/xsimd_neon.hpp b/include/xsimd/arch/xsimd_neon.hpp
@@ -256,7 +256,7 @@ namespace xsimd
         XSIMD_INLINE batch<R, A> bitwise_cast(batch<T, A> const& arg, batch<R, A> const&, requires_arch<neon>) noexcept
         {
             using src_register_type = typename batch<T, A>::register_type;
-            return wrap::x_vreinterpretq<project_num_t<R>, project_num_t<T>>(src_register_type(arg));
+            return wrap::x_vreinterpretq<map_to_sized_type_t<R>, map_to_sized_type_t<T>>(src_register_type(arg));
         }
 
         /*************
@@ -846,7 +846,7 @@ namespace xsimd
         XSIMD_INLINE batch<T, A> add(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<neon>) noexcept
         {
             using register_type = typename batch<T, A>::register_type;
-            return wrap::x_vaddq<project_num_t<T>>(register_type(lhs), register_type(rhs));
+            return wrap::x_vaddq<map_to_sized_type_t<T>>(register_type(lhs), register_type(rhs));
         }
 
         /*******
@@ -870,7 +870,7 @@ namespace xsimd
         XSIMD_INLINE batch<T, A> avg(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<neon>) noexcept
         {
             using register_type = typename batch<T, A>::register_type;
-            return wrap::x_vhaddq<project_num_t<T>>(register_type(lhs), register_type(rhs));
+            return wrap::x_vhaddq<map_to_sized_type_t<T>>(register_type(lhs), register_type(rhs));
         }
 
         /********
@@ -894,7 +894,7 @@ namespace xsimd
         XSIMD_INLINE batch<T, A> avgr(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<neon>) noexcept
         {
             using register_type = typename batch<T, A>::register_type;
-            return wrap::x_vrhaddq<project_num_t<T>>(register_type(lhs), register_type(rhs));
+            return wrap::x_vrhaddq<map_to_sized_type_t<T>>(register_type(lhs), register_type(rhs));
         }
 
         /********
@@ -930,7 +930,7 @@ namespace xsimd
         XSIMD_INLINE batch<T, A> sadd(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<neon>) noexcept
         {
             using register_type = typename batch<T, A>::register_type;
-            return wrap::x_vqaddq<project_num_t<T>>(register_type(lhs), register_type(rhs));
+            return wrap::x_vqaddq<map_to_sized_type_t<T>>(register_type(lhs), register_type(rhs));
         }
 
         /*******
@@ -966,7 +966,7 @@ namespace xsimd
         XSIMD_INLINE batch<T, A> sub(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<neon>) noexcept
         {
             using register_type = typename batch<T, A>::register_type;
-            return wrap::x_vsubq<project_num_t<T>>(register_type(lhs), register_type(rhs));
+            return wrap::x_vsubq<map_to_sized_type_t<T>>(register_type(lhs), register_type(rhs));
         }
 
         /********
@@ -1002,7 +1002,7 @@ namespace xsimd
         XSIMD_INLINE batch<T, A> ssub(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<neon>) noexcept
         {
             using register_type = typename batch<T, A>::register_type;
-            return wrap::x_vqsubq<project_num_t<T>>(register_type(lhs), register_type(rhs));
+            return wrap::x_vqsubq<map_to_sized_type_t<T>>(register_type(lhs), register_type(rhs));
         }
 
         /*******
@@ -1034,7 +1034,7 @@ namespace xsimd
         XSIMD_INLINE batch<T, A> mul(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<neon>) noexcept
         {
             using register_type = typename batch<T, A>::register_type;
-            return wrap::x_vmulq<project_num_t<T>>(register_type(lhs), register_type(rhs));
+            return wrap::x_vmulq<map_to_sized_type_t<T>>(register_type(lhs), register_type(rhs));
         }
 
         /*******
@@ -1101,7 +1101,7 @@ namespace xsimd
         XSIMD_INLINE batch_bool<T, A> eq(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<neon>) noexcept
         {
             using register_type = typename batch<T, A>::register_type;
-            return wrap::x_vceqq<project_num_t<T>>(register_type(lhs), register_type(rhs));
+            return wrap::x_vceqq<map_to_sized_type_t<T>>(register_type(lhs), register_type(rhs));
         }
 
         template <class A, class T, detail::exclude_int64_neon_t<T> = 0>
@@ -1196,7 +1196,7 @@ namespace xsimd
         XSIMD_INLINE batch_bool<T, A> lt(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<neon>) noexcept
         {
             using register_type = typename batch<T, A>::register_type;
-            return wrap::x_vcltq<project_num_t<T>>(register_type(lhs), register_type(rhs));
+            return wrap::x_vcltq<map_to_sized_type_t<T>>(register_type(lhs), register_type(rhs));
         }
 
         template <class A, class T, detail::enable_sized_signed_t<T, 8> = 0>
@@ -1243,7 +1243,7 @@ namespace xsimd
         XSIMD_INLINE batch_bool<T, A> le(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<neon>) noexcept
         {
             using register_type = typename batch<T, A>::register_type;
-            return wrap::x_vcleq<project_num_t<T>>(register_type(lhs), register_type(rhs));
+            return wrap::x_vcleq<map_to_sized_type_t<T>>(register_type(lhs), register_type(rhs));
         }
 
         template <class A, class T, detail::enable_sized_integral_t<T, 8> = 0>
@@ -1281,7 +1281,7 @@ namespace xsimd
         XSIMD_INLINE batch_bool<T, A> gt(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<neon>) noexcept
         {
             using register_type = typename batch<T, A>::register_type;
-            return wrap::x_vcgtq<project_num_t<T>>(register_type(lhs), register_type(rhs));
+            return wrap::x_vcgtq<map_to_sized_type_t<T>>(register_type(lhs), register_type(rhs));
         }
 
         template <class A, class T, detail::enable_sized_signed_t<T, 8> = 0>
@@ -1328,7 +1328,7 @@ namespace xsimd
         XSIMD_INLINE batch_bool<T, A> ge(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<neon>) noexcept
         {
             using register_type = typename batch<T, A>::register_type;
-            return wrap::x_vcgeq<project_num_t<T>>(register_type(lhs), register_type(rhs));
+            return wrap::x_vcgeq<map_to_sized_type_t<T>>(register_type(lhs), register_type(rhs));
         }
 
         template <class A, class T, detail::enable_sized_integral_t<T, 8> = 0>
@@ -1385,7 +1385,7 @@ namespace xsimd
         XSIMD_INLINE batch<T, A> bitwise_and(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<neon>) noexcept
         {
             using register_type = typename batch<T, A>::register_type;
-            return wrap::x_vandq<project_num_t<T>>(register_type(lhs), register_type(rhs));
+            return wrap::x_vandq<map_to_sized_type_t<T>>(register_type(lhs), register_type(rhs));
         }
 
         template <class A, class T, detail::enable_neon_type_t<T> = 0>
@@ -1432,7 +1432,7 @@ namespace xsimd
         XSIMD_INLINE batch<T, A> bitwise_or(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<neon>) noexcept
         {
             using register_type = typename batch<T, A>::register_type;
-            return wrap::x_vorrq<project_num_t<T>>(register_type(lhs), register_type(rhs));
+            return wrap::x_vorrq<map_to_sized_type_t<T>>(register_type(lhs), register_type(rhs));
         }
 
         template <class A, class T, detail::enable_neon_type_t<T> = 0>
@@ -1479,7 +1479,7 @@ namespace xsimd
         XSIMD_INLINE batch<T, A> bitwise_xor(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<neon>) noexcept
         {
             using register_type = typename batch<T, A>::register_type;
-            return wrap::x_veorq<project_num_t<T>>(register_type(lhs), register_type(rhs));
+            return wrap::x_veorq<map_to_sized_type_t<T>>(register_type(lhs), register_type(rhs));
         }
 
         template <class A, class T, detail::enable_neon_type_t<T> = 0>
@@ -1541,7 +1541,7 @@ namespace xsimd
         XSIMD_INLINE batch<T, A> bitwise_not(batch<T, A> const& arg, requires_arch<neon>) noexcept
         {
             using register_type = typename batch<T, A>::register_type;
-            return wrap::x_vmvnq<project_num_t<T>>(register_type(arg));
+            return wrap::x_vmvnq<map_to_sized_type_t<T>>(register_type(arg));
         }
 
         template <class A, class T, detail::enable_neon_type_t<T> = 0>
@@ -1587,7 +1587,7 @@ namespace xsimd
         XSIMD_INLINE batch<T, A> bitwise_andnot(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<neon>) noexcept
         {
             using register_type = typename batch<T, A>::register_type;
-            return wrap::x_vbicq<project_num_t<T>>(register_type(lhs), register_type(rhs));
+            return wrap::x_vbicq<map_to_sized_type_t<T>>(register_type(lhs), register_type(rhs));
         }
 
         template <class A, class T, detail::enable_neon_type_t<T> = 0>
@@ -1626,7 +1626,7 @@ namespace xsimd
         XSIMD_INLINE batch<T, A> min(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<neon>) noexcept
         {
             using register_type = typename batch<T, A>::register_type;
-            return wrap::x_vminq<project_num_t<T>>(register_type(lhs), register_type(rhs));
+            return wrap::x_vminq<map_to_sized_type_t<T>>(register_type(lhs), register_type(rhs));
         }
 
         template <class A, class T, detail::enable_sized_integral_t<T, 8> = 0>
@@ -1664,7 +1664,7 @@ namespace xsimd
         XSIMD_INLINE batch<T, A> max(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<neon>) noexcept
         {
             using register_type = typename batch<T, A>::register_type;
-            return wrap::x_vmaxq<project_num_t<T>>(register_type(lhs), register_type(rhs));
+            return wrap::x_vmaxq<map_to_sized_type_t<T>>(register_type(lhs), register_type(rhs));
         }
 
         template <class A, class T, detail::enable_sized_integral_t<T, 8> = 0>
@@ -1702,7 +1702,7 @@ namespace xsimd
         XSIMD_INLINE batch<T, A> abs(batch<T, A> const& arg, requires_arch<neon>) noexcept
         {
             using register_type = typename batch<T, A>::register_type;
-            return wrap::x_vabsq<project_num_t<T>>(register_type(arg));
+            return wrap::x_vabsq<map_to_sized_type_t<T>>(register_type(arg));
         }
 
         /********
@@ -2052,7 +2052,7 @@ namespace xsimd
         {
             using bool_register_type = typename batch_bool<T, A>::register_type;
             using register_type = typename batch<T, A>::register_type;
-            return wrap::x_vbslq<project_num_t<T>>(bool_register_type(cond), register_type(a), register_type(b));
+            return wrap::x_vbslq<map_to_sized_type_t<T>>(bool_register_type(cond), register_type(a), register_type(b));
         }
 
         template <class A, class T, bool... b, detail::enable_neon_type_t<T> = 0>
@@ -3182,7 +3182,7 @@ namespace xsimd
         XSIMD_INLINE batch<T, A> rotate_left(batch<T, A> const& a, requires_arch<neon>) noexcept
         {
             using register_type = typename batch<T, A>::register_type;
-            return wrap::x_rotate_left<N, project_num_t<T>>(register_type(a), register_type(a));
+            return wrap::x_rotate_left<N, map_to_sized_type_t<T>>(register_type(a), register_type(a));
         }
     }
 
diff --git a/include/xsimd/arch/xsimd_neon64.hpp b/include/xsimd/arch/xsimd_neon64.hpp
@@ -1309,14 +1309,14 @@ namespace xsimd
         XSIMD_INLINE batch<double, A> bitwise_cast(batch<T, A> const& arg, batch<double, A> const&, requires_arch<neon64>) noexcept
         {
             using register_type = typename batch<T, A>::register_type;
-            return wrap::x_vreinterpretq<double, project_num_t<T>>(register_type(arg));
+            return wrap::x_vreinterpretq<double, map_to_sized_type_t<T>>(register_type(arg));
         }
 
         template <class A, class R>
         XSIMD_INLINE batch<R, A> bitwise_cast(batch<double, A> const& arg, batch<R, A> const&, requires_arch<neon64>) noexcept
         {
             using src_register_type = typename batch<double, A>::register_type;
-            return wrap::x_vreinterpretq<project_num_t<R>, double>(src_register_type(arg));
+            return wrap::x_vreinterpretq<map_to_sized_type_t<R>, double>(src_register_type(arg));
         }
 
         template <class A>
diff --git a/include/xsimd/arch/xsimd_rvv.hpp b/include/xsimd/arch/xsimd_rvv.hpp
@@ -388,7 +388,7 @@ namespace xsimd
                 // A bit of a dance, here, because rvvmv_splat has no other
                 // argument from which to deduce type, and T=char is not
                 // supported.
-                project_num_t<T> arg_not_char(arg);
+                map_to_sized_type_t<T> arg_not_char(arg);
                 const auto splat = rvvmv_splat(arg_not_char);
                 return rvv_reg_t<T, Width>(splat.get_bytes(), types::detail::XSIMD_RVV_BITCAST);
             }
@@ -414,7 +414,7 @@ namespace xsimd
         template <class A, class T, detail::enable_arithmetic_t<T> = 0>
         XSIMD_INLINE batch<T, A> load_aligned(T const* src, convert<T>, requires_arch<rvv>) noexcept
         {
-            return detail_rvv::rvvle(reinterpret_cast<project_num_t<T> const*>(src));
+            return detail_rvv::rvvle(reinterpret_cast<map_to_sized_type_t<T> const*>(src));
         }
 
         template <class A, class T, detail::enable_arithmetic_t<T> = 0>
@@ -491,7 +491,7 @@ namespace xsimd
         template <class A, class T, detail::enable_arithmetic_t<T> = 0>
         XSIMD_INLINE void store_aligned(T* dst, batch<T, A> const& src, requires_arch<rvv>) noexcept
         {
-            detail_rvv::rvvse(reinterpret_cast<project_num_t<T>*>(dst), src);
+            detail_rvv::rvvse(reinterpret_cast<map_to_sized_type_t<T>*>(dst), src);
         }
 
         template <class A, class T, detail::enable_arithmetic_t<T> = 0>
@@ -522,7 +522,7 @@ namespace xsimd
         {
             using UU = as_unsigned_integer_t<U>;
             const auto uindex = detail_rvv::rvv_to_unsigned_batch(index);
-            auto* base = reinterpret_cast<project_num_t<T>*>(dst);
+            auto* base = reinterpret_cast<map_to_sized_type_t<T>*>(dst);
             // or rvvsuxei
             const auto bi = detail_rvv::rvvmul_splat(uindex, sizeof(T));
             detail_rvv::rvvsoxei(base, bi, vals);
@@ -534,7 +534,7 @@ namespace xsimd
         {
             using UU = as_unsigned_integer_t<U>;
             const auto uindex = detail_rvv::rvv_to_unsigned_batch(index);
-            auto const* base = reinterpret_cast<project_num_t<T> const*>(src);
+            auto const* base = reinterpret_cast<map_to_sized_type_t<T> const*>(src);
             // or rvvluxei
             const auto bi = detail_rvv::rvvmul_splat(uindex, sizeof(T));
             return detail_rvv::rvvloxei(base, bi);
diff --git a/include/xsimd/arch/xsimd_sve.hpp b/include/xsimd/arch/xsimd_sve.hpp
@@ -92,7 +92,7 @@ namespace xsimd
         template <class A, class T, detail::enable_arithmetic_t<T> = 0>
         XSIMD_INLINE batch<T, A> load_aligned(T const* src, convert<T>, requires_arch<sve>) noexcept
         {
-            return svld1(detail_sve::ptrue<T>(), reinterpret_cast<project_num_t<T> const*>(src));
+            return svld1(detail_sve::ptrue<T>(), reinterpret_cast<map_to_sized_type_t<T> const*>(src));
         }
 
         template <class A, class T, detail::enable_arithmetic_t<T> = 0>
@@ -105,7 +105,7 @@ namespace xsimd
         template <class A, class T, bool... Values, class Mode, detail::enable_arithmetic_t<T> = 0>
         XSIMD_INLINE batch<T, A> load_masked(T const* mem, batch_bool_constant<float, A, Values...>, Mode, requires_arch<sve>) noexcept
         {
-            return svld1(detail_sve::pmask<Values...>(), reinterpret_cast<project_num_t<T> const*>(mem));
+            return svld1(detail_sve::pmask<Values...>(), reinterpret_cast<map_to_sized_type_t<T> const*>(mem));
         }
 
         // load_complex
@@ -132,7 +132,7 @@ namespace xsimd
         template <class A, class T, detail::enable_arithmetic_t<T> = 0>
         XSIMD_INLINE void store_aligned(T* dst, batch<T, A> const& src, requires_arch<sve>) noexcept
         {
-            svst1(detail_sve::ptrue<T>(), reinterpret_cast<project_num_t<T>*>(dst), src);
+            svst1(detail_sve::ptrue<T>(), reinterpret_cast<map_to_sized_type_t<T>*>(dst), src);
         }
 
         template <class A, class T, detail::enable_arithmetic_t<T> = 0>
diff --git a/include/xsimd/types/xsimd_rvv_register.hpp b/include/xsimd/types/xsimd_rvv_register.hpp
@@ -326,7 +326,7 @@ namespace xsimd
                 operator register_type() const noexcept { return value.get(); }
             };
             template <class T, size_t Width = XSIMD_RVV_BITS>
-            using rvv_reg_t = std::conditional_t<!std::is_void<T>::value, rvv_reg<project_num_t<T>, Width>, void>;
+            using rvv_reg_t = std::conditional_t<!std::is_void<T>::value, rvv_reg<map_to_sized_type_t<T>, Width>, void>;
 
             // And some more of the same stuff for bool types, which have
             // similar problems and similar workarounds.
@@ -388,7 +388,7 @@ namespace xsimd
 
             template <class T, size_t Width = XSIMD_RVV_BITS>
             using rvv_bool_t = std::enable_if_t < !std::is_void<T>::value,
-                  rvv_bool<project_num_t<T>, Width<rvv_width_m1 ? rvv_width_m1 : Width>>;
+                  rvv_bool<map_to_sized_type_t<T>, Width<rvv_width_m1 ? rvv_width_m1 : Width>>;
 
             template <size_t S>
             struct rvv_vector_type_impl;
diff --git a/include/xsimd/utils/xsimd_type_traits.hpp b/include/xsimd/utils/xsimd_type_traits.hpp
@@ -127,7 +127,7 @@ namespace xsimd
      * @tparam T arithmetic type to project from.
      */
     template <typename T>
-    using project_num_t = typename detail::remap_num<T, /* factor= */ 1>::type;
+    using map_to_sized_type_t = typename detail::remap_num<T, /* factor= */ 1>::type;
 
     /**
      * @ingroup type_traits

Original file line number	Diff line number	Diff line change
`@@ -256,7 +256,7 @@ namespace xsimd`
`256`	`256`	`XSIMD_INLINE batch<R, A> bitwise_cast(batch<T, A> const& arg, batch<R, A> const&, requires_arch<neon>) noexcept`
`257`	`257`	`{`
`258`	`258`	`using src_register_type = typename batch<T, A>::register_type;`
`259`		`- return wrap::x_vreinterpretq<project_num_t<R>, project_num_t<T>>(src_register_type(arg));`
	`259`	`+ return wrap::x_vreinterpretq<map_to_sized_type_t<R>, map_to_sized_type_t<T>>(src_register_type(arg));`
`260`	`260`	`}`
`261`	`261`
`262`	`262`	`/*************`
`@@ -846,7 +846,7 @@ namespace xsimd`
`846`	`846`	`XSIMD_INLINE batch<T, A> add(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<neon>) noexcept`
`847`	`847`	`{`
`848`	`848`	`using register_type = typename batch<T, A>::register_type;`
`849`		`- return wrap::x_vaddq<project_num_t<T>>(register_type(lhs), register_type(rhs));`
	`849`	`+ return wrap::x_vaddq<map_to_sized_type_t<T>>(register_type(lhs), register_type(rhs));`
`850`	`850`	`}`
`851`	`851`
`852`	`852`	`/*******`
`@@ -870,7 +870,7 @@ namespace xsimd`
`870`	`870`	`XSIMD_INLINE batch<T, A> avg(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<neon>) noexcept`
`871`	`871`	`{`
`872`	`872`	`using register_type = typename batch<T, A>::register_type;`
`873`		`- return wrap::x_vhaddq<project_num_t<T>>(register_type(lhs), register_type(rhs));`
	`873`	`+ return wrap::x_vhaddq<map_to_sized_type_t<T>>(register_type(lhs), register_type(rhs));`
`874`	`874`	`}`
`875`	`875`
`876`	`876`	`/********`
`@@ -894,7 +894,7 @@ namespace xsimd`
`894`	`894`	`XSIMD_INLINE batch<T, A> avgr(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<neon>) noexcept`
`895`	`895`	`{`
`896`	`896`	`using register_type = typename batch<T, A>::register_type;`
`897`		`- return wrap::x_vrhaddq<project_num_t<T>>(register_type(lhs), register_type(rhs));`
	`897`	`+ return wrap::x_vrhaddq<map_to_sized_type_t<T>>(register_type(lhs), register_type(rhs));`
`898`	`898`	`}`
`899`	`899`
`900`	`900`	`/********`
`@@ -930,7 +930,7 @@ namespace xsimd`
`930`	`930`	`XSIMD_INLINE batch<T, A> sadd(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<neon>) noexcept`
`931`	`931`	`{`
`932`	`932`	`using register_type = typename batch<T, A>::register_type;`
`933`		`- return wrap::x_vqaddq<project_num_t<T>>(register_type(lhs), register_type(rhs));`
	`933`	`+ return wrap::x_vqaddq<map_to_sized_type_t<T>>(register_type(lhs), register_type(rhs));`
`934`	`934`	`}`
`935`	`935`
`936`	`936`	`/*******`
`@@ -966,7 +966,7 @@ namespace xsimd`
`966`	`966`	`XSIMD_INLINE batch<T, A> sub(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<neon>) noexcept`
`967`	`967`	`{`
`968`	`968`	`using register_type = typename batch<T, A>::register_type;`
`969`		`- return wrap::x_vsubq<project_num_t<T>>(register_type(lhs), register_type(rhs));`
	`969`	`+ return wrap::x_vsubq<map_to_sized_type_t<T>>(register_type(lhs), register_type(rhs));`
`970`	`970`	`}`
`971`	`971`
`972`	`972`	`/********`
`@@ -1002,7 +1002,7 @@ namespace xsimd`
`1002`	`1002`	`XSIMD_INLINE batch<T, A> ssub(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<neon>) noexcept`
`1003`	`1003`	`{`
`1004`	`1004`	`using register_type = typename batch<T, A>::register_type;`
`1005`		`- return wrap::x_vqsubq<project_num_t<T>>(register_type(lhs), register_type(rhs));`
	`1005`	`+ return wrap::x_vqsubq<map_to_sized_type_t<T>>(register_type(lhs), register_type(rhs));`
`1006`	`1006`	`}`
`1007`	`1007`
`1008`	`1008`	`/*******`
`@@ -1034,7 +1034,7 @@ namespace xsimd`
`1034`	`1034`	`XSIMD_INLINE batch<T, A> mul(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<neon>) noexcept`
`1035`	`1035`	`{`
`1036`	`1036`	`using register_type = typename batch<T, A>::register_type;`
`1037`		`- return wrap::x_vmulq<project_num_t<T>>(register_type(lhs), register_type(rhs));`
	`1037`	`+ return wrap::x_vmulq<map_to_sized_type_t<T>>(register_type(lhs), register_type(rhs));`
`1038`	`1038`	`}`
`1039`	`1039`
`1040`	`1040`	`/*******`
`@@ -1101,7 +1101,7 @@ namespace xsimd`
`1101`	`1101`	`XSIMD_INLINE batch_bool<T, A> eq(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<neon>) noexcept`
`1102`	`1102`	`{`
`1103`	`1103`	`using register_type = typename batch<T, A>::register_type;`
`1104`		`- return wrap::x_vceqq<project_num_t<T>>(register_type(lhs), register_type(rhs));`
	`1104`	`+ return wrap::x_vceqq<map_to_sized_type_t<T>>(register_type(lhs), register_type(rhs));`
`1105`	`1105`	`}`
`1106`	`1106`
`1107`	`1107`	`template <class A, class T, detail::exclude_int64_neon_t<T> = 0>`
`@@ -1196,7 +1196,7 @@ namespace xsimd`
`1196`	`1196`	`XSIMD_INLINE batch_bool<T, A> lt(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<neon>) noexcept`
`1197`	`1197`	`{`
`1198`	`1198`	`using register_type = typename batch<T, A>::register_type;`
`1199`		`- return wrap::x_vcltq<project_num_t<T>>(register_type(lhs), register_type(rhs));`
	`1199`	`+ return wrap::x_vcltq<map_to_sized_type_t<T>>(register_type(lhs), register_type(rhs));`
`1200`	`1200`	`}`
`1201`	`1201`
`1202`	`1202`	`template <class A, class T, detail::enable_sized_signed_t<T, 8> = 0>`
`@@ -1243,7 +1243,7 @@ namespace xsimd`
`1243`	`1243`	`XSIMD_INLINE batch_bool<T, A> le(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<neon>) noexcept`
`1244`	`1244`	`{`
`1245`	`1245`	`using register_type = typename batch<T, A>::register_type;`
`1246`		`- return wrap::x_vcleq<project_num_t<T>>(register_type(lhs), register_type(rhs));`
	`1246`	`+ return wrap::x_vcleq<map_to_sized_type_t<T>>(register_type(lhs), register_type(rhs));`
`1247`	`1247`	`}`
`1248`	`1248`
`1249`	`1249`	`template <class A, class T, detail::enable_sized_integral_t<T, 8> = 0>`
`@@ -1281,7 +1281,7 @@ namespace xsimd`
`1281`	`1281`	`XSIMD_INLINE batch_bool<T, A> gt(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<neon>) noexcept`
`1282`	`1282`	`{`
`1283`	`1283`	`using register_type = typename batch<T, A>::register_type;`
`1284`		`- return wrap::x_vcgtq<project_num_t<T>>(register_type(lhs), register_type(rhs));`
	`1284`	`+ return wrap::x_vcgtq<map_to_sized_type_t<T>>(register_type(lhs), register_type(rhs));`
`1285`	`1285`	`}`
`1286`	`1286`
`1287`	`1287`	`template <class A, class T, detail::enable_sized_signed_t<T, 8> = 0>`
`@@ -1328,7 +1328,7 @@ namespace xsimd`
`1328`	`1328`	`XSIMD_INLINE batch_bool<T, A> ge(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<neon>) noexcept`
`1329`	`1329`	`{`
`1330`	`1330`	`using register_type = typename batch<T, A>::register_type;`
`1331`		`- return wrap::x_vcgeq<project_num_t<T>>(register_type(lhs), register_type(rhs));`
	`1331`	`+ return wrap::x_vcgeq<map_to_sized_type_t<T>>(register_type(lhs), register_type(rhs));`
`1332`	`1332`	`}`
`1333`	`1333`
`1334`	`1334`	`template <class A, class T, detail::enable_sized_integral_t<T, 8> = 0>`
`@@ -1385,7 +1385,7 @@ namespace xsimd`
`1385`	`1385`	`XSIMD_INLINE batch<T, A> bitwise_and(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<neon>) noexcept`
`1386`	`1386`	`{`
`1387`	`1387`	`using register_type = typename batch<T, A>::register_type;`
`1388`		`- return wrap::x_vandq<project_num_t<T>>(register_type(lhs), register_type(rhs));`
	`1388`	`+ return wrap::x_vandq<map_to_sized_type_t<T>>(register_type(lhs), register_type(rhs));`
`1389`	`1389`	`}`
`1390`	`1390`
`1391`	`1391`	`template <class A, class T, detail::enable_neon_type_t<T> = 0>`
`@@ -1432,7 +1432,7 @@ namespace xsimd`
`1432`	`1432`	`XSIMD_INLINE batch<T, A> bitwise_or(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<neon>) noexcept`
`1433`	`1433`	`{`
`1434`	`1434`	`using register_type = typename batch<T, A>::register_type;`
`1435`		`- return wrap::x_vorrq<project_num_t<T>>(register_type(lhs), register_type(rhs));`
	`1435`	`+ return wrap::x_vorrq<map_to_sized_type_t<T>>(register_type(lhs), register_type(rhs));`
`1436`	`1436`	`}`
`1437`	`1437`
`1438`	`1438`	`template <class A, class T, detail::enable_neon_type_t<T> = 0>`
`@@ -1479,7 +1479,7 @@ namespace xsimd`
`1479`	`1479`	`XSIMD_INLINE batch<T, A> bitwise_xor(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<neon>) noexcept`
`1480`	`1480`	`{`
`1481`	`1481`	`using register_type = typename batch<T, A>::register_type;`
`1482`		`- return wrap::x_veorq<project_num_t<T>>(register_type(lhs), register_type(rhs));`
	`1482`	`+ return wrap::x_veorq<map_to_sized_type_t<T>>(register_type(lhs), register_type(rhs));`
`1483`	`1483`	`}`
`1484`	`1484`
`1485`	`1485`	`template <class A, class T, detail::enable_neon_type_t<T> = 0>`
`@@ -1541,7 +1541,7 @@ namespace xsimd`
`1541`	`1541`	`XSIMD_INLINE batch<T, A> bitwise_not(batch<T, A> const& arg, requires_arch<neon>) noexcept`
`1542`	`1542`	`{`
`1543`	`1543`	`using register_type = typename batch<T, A>::register_type;`
`1544`		`- return wrap::x_vmvnq<project_num_t<T>>(register_type(arg));`
	`1544`	`+ return wrap::x_vmvnq<map_to_sized_type_t<T>>(register_type(arg));`
`1545`	`1545`	`}`
`1546`	`1546`
`1547`	`1547`	`template <class A, class T, detail::enable_neon_type_t<T> = 0>`
`@@ -1587,7 +1587,7 @@ namespace xsimd`
`1587`	`1587`	`XSIMD_INLINE batch<T, A> bitwise_andnot(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<neon>) noexcept`
`1588`	`1588`	`{`
`1589`	`1589`	`using register_type = typename batch<T, A>::register_type;`
`1590`		`- return wrap::x_vbicq<project_num_t<T>>(register_type(lhs), register_type(rhs));`
	`1590`	`+ return wrap::x_vbicq<map_to_sized_type_t<T>>(register_type(lhs), register_type(rhs));`
`1591`	`1591`	`}`
`1592`	`1592`
`1593`	`1593`	`template <class A, class T, detail::enable_neon_type_t<T> = 0>`
`@@ -1626,7 +1626,7 @@ namespace xsimd`
`1626`	`1626`	`XSIMD_INLINE batch<T, A> min(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<neon>) noexcept`
`1627`	`1627`	`{`
`1628`	`1628`	`using register_type = typename batch<T, A>::register_type;`
`1629`		`- return wrap::x_vminq<project_num_t<T>>(register_type(lhs), register_type(rhs));`
	`1629`	`+ return wrap::x_vminq<map_to_sized_type_t<T>>(register_type(lhs), register_type(rhs));`
`1630`	`1630`	`}`
`1631`	`1631`
`1632`	`1632`	`template <class A, class T, detail::enable_sized_integral_t<T, 8> = 0>`
`@@ -1664,7 +1664,7 @@ namespace xsimd`
`1664`	`1664`	`XSIMD_INLINE batch<T, A> max(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<neon>) noexcept`
`1665`	`1665`	`{`
`1666`	`1666`	`using register_type = typename batch<T, A>::register_type;`
`1667`		`- return wrap::x_vmaxq<project_num_t<T>>(register_type(lhs), register_type(rhs));`
	`1667`	`+ return wrap::x_vmaxq<map_to_sized_type_t<T>>(register_type(lhs), register_type(rhs));`
`1668`	`1668`	`}`
`1669`	`1669`
`1670`	`1670`	`template <class A, class T, detail::enable_sized_integral_t<T, 8> = 0>`
`@@ -1702,7 +1702,7 @@ namespace xsimd`
`1702`	`1702`	`XSIMD_INLINE batch<T, A> abs(batch<T, A> const& arg, requires_arch<neon>) noexcept`
`1703`	`1703`	`{`
`1704`	`1704`	`using register_type = typename batch<T, A>::register_type;`
`1705`		`- return wrap::x_vabsq<project_num_t<T>>(register_type(arg));`
	`1705`	`+ return wrap::x_vabsq<map_to_sized_type_t<T>>(register_type(arg));`
`1706`	`1706`	`}`
`1707`	`1707`
`1708`	`1708`	`/********`
`@@ -2052,7 +2052,7 @@ namespace xsimd`
`2052`	`2052`	`{`
`2053`	`2053`	`using bool_register_type = typename batch_bool<T, A>::register_type;`
`2054`	`2054`	`using register_type = typename batch<T, A>::register_type;`
`2055`		`- return wrap::x_vbslq<project_num_t<T>>(bool_register_type(cond), register_type(a), register_type(b));`
	`2055`	`+ return wrap::x_vbslq<map_to_sized_type_t<T>>(bool_register_type(cond), register_type(a), register_type(b));`
`2056`	`2056`	`}`
`2057`	`2057`
`2058`	`2058`	`template <class A, class T, bool... b, detail::enable_neon_type_t<T> = 0>`
`@@ -3182,7 +3182,7 @@ namespace xsimd`
`3182`	`3182`	`XSIMD_INLINE batch<T, A> rotate_left(batch<T, A> const& a, requires_arch<neon>) noexcept`
`3183`	`3183`	`{`
`3184`	`3184`	`using register_type = typename batch<T, A>::register_type;`
`3185`		`- return wrap::x_rotate_left<N, project_num_t<T>>(register_type(a), register_type(a));`
	`3185`	`+ return wrap::x_rotate_left<N, map_to_sized_type_t<T>>(register_type(a), register_type(a));`
`3186`	`3186`	`}`
`3187`	`3187`	`}`
`3188`	`3188`
Original file line number	Diff line number	Diff line change
`@@ -1309,14 +1309,14 @@ namespace xsimd`
`1309`	`1309`	`XSIMD_INLINE batch<double, A> bitwise_cast(batch<T, A> const& arg, batch<double, A> const&, requires_arch<neon64>) noexcept`
`1310`	`1310`	`{`
`1311`	`1311`	`using register_type = typename batch<T, A>::register_type;`
`1312`		`- return wrap::x_vreinterpretq<double, project_num_t<T>>(register_type(arg));`
	`1312`	`+ return wrap::x_vreinterpretq<double, map_to_sized_type_t<T>>(register_type(arg));`
`1313`	`1313`	`}`
`1314`	`1314`
`1315`	`1315`	`template <class A, class R>`
`1316`	`1316`	`XSIMD_INLINE batch<R, A> bitwise_cast(batch<double, A> const& arg, batch<R, A> const&, requires_arch<neon64>) noexcept`
`1317`	`1317`	`{`
`1318`	`1318`	`using src_register_type = typename batch<double, A>::register_type;`
`1319`		`- return wrap::x_vreinterpretq<project_num_t<R>, double>(src_register_type(arg));`
	`1319`	`+ return wrap::x_vreinterpretq<map_to_sized_type_t<R>, double>(src_register_type(arg));`
`1320`	`1320`	`}`
`1321`	`1321`
`1322`	`1322`	`template <class A>`
Original file line number	Diff line number	Diff line change
`@@ -388,7 +388,7 @@ namespace xsimd`
`388`	`388`	`// A bit of a dance, here, because rvvmv_splat has no other`
`389`	`389`	`// argument from which to deduce type, and T=char is not`
`390`	`390`	`// supported.`
`391`		`- project_num_t<T> arg_not_char(arg);`
	`391`	`+ map_to_sized_type_t<T> arg_not_char(arg);`
`392`	`392`	`const auto splat = rvvmv_splat(arg_not_char);`
`393`	`393`	`return rvv_reg_t<T, Width>(splat.get_bytes(), types::detail::XSIMD_RVV_BITCAST);`
`394`	`394`	`}`
`@@ -414,7 +414,7 @@ namespace xsimd`
`414`	`414`	`template <class A, class T, detail::enable_arithmetic_t<T> = 0>`
`415`	`415`	`XSIMD_INLINE batch<T, A> load_aligned(T const* src, convert<T>, requires_arch<rvv>) noexcept`
`416`	`416`	`{`
`417`		`- return detail_rvv::rvvle(reinterpret_cast<project_num_t<T> const*>(src));`
	`417`	`+ return detail_rvv::rvvle(reinterpret_cast<map_to_sized_type_t<T> const*>(src));`
`418`	`418`	`}`
`419`	`419`
`420`	`420`	`template <class A, class T, detail::enable_arithmetic_t<T> = 0>`
`@@ -491,7 +491,7 @@ namespace xsimd`
`491`	`491`	`template <class A, class T, detail::enable_arithmetic_t<T> = 0>`
`492`	`492`	`XSIMD_INLINE void store_aligned(T* dst, batch<T, A> const& src, requires_arch<rvv>) noexcept`
`493`	`493`	`{`
`494`		`- detail_rvv::rvvse(reinterpret_cast<project_num_t<T>*>(dst), src);`
	`494`	`+ detail_rvv::rvvse(reinterpret_cast<map_to_sized_type_t<T>*>(dst), src);`
`495`	`495`	`}`
`496`	`496`
`497`	`497`	`template <class A, class T, detail::enable_arithmetic_t<T> = 0>`
`@@ -522,7 +522,7 @@ namespace xsimd`
`522`	`522`	`{`
`523`	`523`	`using UU = as_unsigned_integer_t<U>;`
`524`	`524`	`const auto uindex = detail_rvv::rvv_to_unsigned_batch(index);`
`525`		`- auto* base = reinterpret_cast<project_num_t<T>*>(dst);`
	`525`	`+ auto* base = reinterpret_cast<map_to_sized_type_t<T>*>(dst);`
`526`	`526`	`// or rvvsuxei`
`527`	`527`	`const auto bi = detail_rvv::rvvmul_splat(uindex, sizeof(T));`
`528`	`528`	`detail_rvv::rvvsoxei(base, bi, vals);`
`@@ -534,7 +534,7 @@ namespace xsimd`
`534`	`534`	`{`
`535`	`535`	`using UU = as_unsigned_integer_t<U>;`
`536`	`536`	`const auto uindex = detail_rvv::rvv_to_unsigned_batch(index);`
`537`		`- auto const* base = reinterpret_cast<project_num_t<T> const*>(src);`
	`537`	`+ auto const* base = reinterpret_cast<map_to_sized_type_t<T> const*>(src);`
`538`	`538`	`// or rvvluxei`
`539`	`539`	`const auto bi = detail_rvv::rvvmul_splat(uindex, sizeof(T));`
`540`	`540`	`return detail_rvv::rvvloxei(base, bi);`
Original file line number	Diff line number	Diff line change
`@@ -92,7 +92,7 @@ namespace xsimd`
`92`	`92`	`template <class A, class T, detail::enable_arithmetic_t<T> = 0>`
`93`	`93`	`XSIMD_INLINE batch<T, A> load_aligned(T const* src, convert<T>, requires_arch<sve>) noexcept`
`94`	`94`	`{`
`95`		`- return svld1(detail_sve::ptrue<T>(), reinterpret_cast<project_num_t<T> const*>(src));`
	`95`	`+ return svld1(detail_sve::ptrue<T>(), reinterpret_cast<map_to_sized_type_t<T> const*>(src));`
`96`	`96`	`}`
`97`	`97`
`98`	`98`	`template <class A, class T, detail::enable_arithmetic_t<T> = 0>`
`@@ -105,7 +105,7 @@ namespace xsimd`
`105`	`105`	`template <class A, class T, bool... Values, class Mode, detail::enable_arithmetic_t<T> = 0>`
`106`	`106`	`XSIMD_INLINE batch<T, A> load_masked(T const* mem, batch_bool_constant<float, A, Values...>, Mode, requires_arch<sve>) noexcept`
`107`	`107`	`{`
`108`		`- return svld1(detail_sve::pmask<Values...>(), reinterpret_cast<project_num_t<T> const*>(mem));`
	`108`	`+ return svld1(detail_sve::pmask<Values...>(), reinterpret_cast<map_to_sized_type_t<T> const*>(mem));`
`109`	`109`	`}`
`110`	`110`
`111`	`111`	`// load_complex`
`@@ -132,7 +132,7 @@ namespace xsimd`
`132`	`132`	`template <class A, class T, detail::enable_arithmetic_t<T> = 0>`
`133`	`133`	`XSIMD_INLINE void store_aligned(T* dst, batch<T, A> const& src, requires_arch<sve>) noexcept`
`134`	`134`	`{`
`135`		`- svst1(detail_sve::ptrue<T>(), reinterpret_cast<project_num_t<T>*>(dst), src);`
	`135`	`+ svst1(detail_sve::ptrue<T>(), reinterpret_cast<map_to_sized_type_t<T>*>(dst), src);`
`136`	`136`	`}`
`137`	`137`
`138`	`138`	`template <class A, class T, detail::enable_arithmetic_t<T> = 0>`