diff --git a/builder/cc1as.h b/builder/cc1as.h
index 48a5e0ad27..a7e0f8348f 100644
--- a/builder/cc1as.h
+++ b/builder/cc1as.h
@@ -107,7 +107,7 @@ struct AssemblerInvocation {
   EmitDwarfUnwindType EmitDwarfUnwind;
 
   // Whether to emit compact-unwind for non-canonical entries.
-  // Note: maybe overriden by other constraints.
+  // Note: maybe overridden by other constraints.
   LLVM_PREFERRED_TYPE(bool)
   unsigned EmitCompactUnwindNonCanonical : 1;
 
diff --git a/src/machine/machine_nrf.go b/src/machine/machine_nrf.go
index c36a062977..a7d1eeb08e 100644
--- a/src/machine/machine_nrf.go
+++ b/src/machine/machine_nrf.go
@@ -551,7 +551,7 @@ func handleSoftDeviceEvents() {
 			return // TODO: nrf51 etc
 		}
 		if result != 0 {
-			// Some error occured. The only possible error is
+			// Some error occurred. The only possible error is
 			// NRF_ERROR_NOT_FOUND, which means there are no more events.
 			return
 		}
diff --git a/src/machine/machine_rp2_spi.go b/src/machine/machine_rp2_spi.go
index f3fb256f61..785b8f831b 100644
--- a/src/machine/machine_rp2_spi.go
+++ b/src/machine/machine_rp2_spi.go
@@ -309,7 +309,7 @@ func (spi *SPI) tx(tx []byte) error {
 
 	// Make sure the read buffer stays alive until this point (in the unlikely
 	// case the tx slice wasn't read after this function returns and a GC cycle
-	// happened inbetween).
+	// happened in the meantime).
 	keepAliveNoEscape(unsafe.Pointer(unsafe.SliceData(tx)))
 
 	// We didn't read any result values, which means the RX FIFO has likely
diff --git a/src/runtime/float.go b/src/runtime/float.go
index b5fee4c5c4..54ee938533 100644
--- a/src/runtime/float.go
+++ b/src/runtime/float.go
@@ -76,7 +76,7 @@ func fmaximumf(x, y float32) float32 {
 	return maximumFloat32(x, y)
 }
 
-// Create seperate copies of the function that are not exported.
+// Create separate copies of the function that are not exported.
 // This is necessary so that LLVM does not recognize them as builtins.
 // If tests called the builtins, LLVM would just override them on most platforms.
 
@@ -114,7 +114,7 @@ func minimumFloat[T float, I floatInt](x, y T, minPosNaN, magMask I) T {
 	// We can turn a float into a signed-comparable value by reversing the comparison order of negative values.
 	// We can reverse the order by inverting the bits.
 	// This also ensures that positive zero compares greater than negative zero (as required by the spec).
-	// Negative NaN values will compare less than any other value, so they require no special handling to propogate.
+	// Negative NaN values will compare less than any other value, so they require no special handling to propagate.
 	if xBits < 0 {
 		xBits ^= magMask
 	}
@@ -138,7 +138,7 @@ func maximumFloat[T float, I floatInt](x, y T, minPosNaN, magMask I) T {
 	// We can turn a float into a signed-comparable value by reversing the comparison order of negative values.
 	// We can reverse the order by inverting the bits.
 	// This also ensures that positive zero compares greater than negative zero (as required by the spec).
-	// Positive NaN values will compare greater than any other value, so they require no special handling to propogate.
+	// Positive NaN values will compare greater than any other value, so they require no special handling to propagate.
 	if xBits < 0 {
 		xBits ^= magMask
 	}
diff --git a/src/runtime/gc_precise.go b/src/runtime/gc_precise.go
index 746dd40c03..062cc46afa 100644
--- a/src/runtime/gc_precise.go
+++ b/src/runtime/gc_precise.go
@@ -92,7 +92,7 @@ func (layout gcLayout) scan(start, len uintptr) {
 		scanSimple(start, len, size*unsafe.Alignof(start), mask)
 
 	default:
-		// The layout is stored seperately in a global object.
+		// The layout is stored separately in a global object.
 		// Extract the size and bitmap.
 		layoutAddr := unsafe.Pointer(layout)
 		size := *(*uintptr)(layoutAddr)
diff --git a/targets/rp2350.ld b/targets/rp2350.ld
index 5296a1fb12..e96ffcde70 100644
--- a/targets/rp2350.ld
+++ b/targets/rp2350.ld
@@ -6,7 +6,7 @@ MEMORY
     /* RAM consists of 8 banks, SRAM0..SRAM7 with striped mapping. */
     SRAM : ORIGIN = 0x20000000, LENGTH = 512k
     /* Banks 8 and 9 use direct mapping which can be
-       specailized for applications where predictable access time is beneficial.
+       specialized for applications where predictable access time is beneficial.
        i.e: Separate stacks for core0 and core1. */
     SRAM4 : ORIGIN = 0x20080000, LENGTH = 4k
     SRAM5 : ORIGIN = 0x20081000, LENGTH = 4k