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saulecabrerasaulecabrera
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winch(aarch64): Revisit the shadow stack pointer approach (#10146)
This commit marks another step toward finalizing AArch64 support in Winch. While enabling spec tests, I experienced some unexpected failures related to Wasm loads/stores and traps. The observed symptoms are as follows: * Under normal conditions, Wasm loads/stores work as expected. * In out-of-bounds scenarios, loads/stores result in a segmentation fault, whereas the expected behavior is to trigger an out-of-bounds trap. * When out-of-bounds access can be determined statically, the program still results in a segmentation fault instead of the anticipated out-of-bounds trap. Debugging revealed the following issues: * The stack pointer was not correctly aligned to 16 bytes when entering signal handlers, which caused the segmentation fault. * Wasm loads and stores were not flagged as untrusted, leading to segmentation faults even when the stack pointer was properly aligned. This commit fixes the previous issues by: * Correctly flagging wasm loads and stores as untrusted. * Reworking the shadow stack pointer approach such that it allows aligning the stack pointer at arbitrary points in the program, particularly where signal handling might be needed. This rework involves changing some principles introduced in bytecodealliance/wasmtime#5652; namely: changing the primary stack pointer register to be the shadow stack pointer. See the updates comments in the code for more details. Note that this change doesn't enable spectests. To try this change, run: cargo run -- wast -Ccompiler=winch tests/spec_testsuite/address.wast
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472 files changed

Lines changed: 2252 additions & 2198 deletions

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‎tests/disas/winch/aarch64/br/as_br_if_cond.wat‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -10,11 +10,11 @@
1010
;; mov x29, sp
1111
;; mov x28, sp
1212
;; mov x9, x0
13-
;; sub sp, sp, #0x10
14-
;; mov x28, sp
13+
;; sub x28, x28, #0x10
14+
;; mov sp, x28
1515
;; stur x0, [x28, #8]
1616
;; stur x1, [x28]
17-
;; add sp, sp, #0x10
18-
;; mov x28, sp
17+
;; add x28, x28, #0x10
18+
;; mov sp, x28
1919
;; ldp x29, x30, [sp], #0x10
2020
;; ret

‎tests/disas/winch/aarch64/br/as_br_value.wat‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -10,13 +10,13 @@
1010
;; mov x29, sp
1111
;; mov x28, sp
1212
;; mov x9, x0
13-
;; sub sp, sp, #0x10
14-
;; mov x28, sp
13+
;; sub x28, x28, #0x10
14+
;; mov sp, x28
1515
;; stur x0, [x28, #8]
1616
;; stur x1, [x28]
1717
;; mov x16, #9
1818
;; mov w0, w16
19-
;; add sp, sp, #0x10
20-
;; mov x28, sp
19+
;; add x28, x28, #0x10
20+
;; mov sp, x28
2121
;; ldp x29, x30, [sp], #0x10
2222
;; ret

‎tests/disas/winch/aarch64/br/as_if_cond.wat‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -15,13 +15,13 @@
1515
;; mov x29, sp
1616
;; mov x28, sp
1717
;; mov x9, x0
18-
;; sub sp, sp, #0x10
19-
;; mov x28, sp
18+
;; sub x28, x28, #0x10
19+
;; mov sp, x28
2020
;; stur x0, [x28, #8]
2121
;; stur x1, [x28]
2222
;; mov x16, #2
2323
;; mov w0, w16
24-
;; add sp, sp, #0x10
25-
;; mov x28, sp
24+
;; add x28, x28, #0x10
25+
;; mov sp, x28
2626
;; ldp x29, x30, [sp], #0x10
2727
;; ret

‎tests/disas/winch/aarch64/br/as_if_else.wat‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -15,8 +15,8 @@
1515
;; mov x29, sp
1616
;; mov x28, sp
1717
;; mov x9, x0
18-
;; sub sp, sp, #0x18
19-
;; mov x28, sp
18+
;; sub x28, x28, #0x18
19+
;; mov sp, x28
2020
;; stur x0, [x28, #0x10]
2121
;; stur x1, [x28, #8]
2222
;; stur w2, [x28, #4]
@@ -29,7 +29,7 @@
2929
;; b #0x48
3030
;; 40: mov x16, #4
3131
;; mov w0, w16
32-
;; add sp, sp, #0x18
33-
;; mov x28, sp
32+
;; add x28, x28, #0x18
33+
;; mov sp, x28
3434
;; ldp x29, x30, [sp], #0x10
3535
;; ret

‎tests/disas/winch/aarch64/br/as_if_then.wat‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -15,8 +15,8 @@
1515
;; mov x29, sp
1616
;; mov x28, sp
1717
;; mov x9, x0
18-
;; sub sp, sp, #0x18
19-
;; mov x28, sp
18+
;; sub x28, x28, #0x18
19+
;; mov sp, x28
2020
;; stur x0, [x28, #0x10]
2121
;; stur x1, [x28, #8]
2222
;; stur w2, [x28, #4]
@@ -29,7 +29,7 @@
2929
;; mov w0, w16
3030
;; b #0x48
3131
;; 44: ldur w0, [x28]
32-
;; add sp, sp, #0x18
33-
;; mov x28, sp
32+
;; add x28, x28, #0x18
33+
;; mov sp, x28
3434
;; ldp x29, x30, [sp], #0x10
3535
;; ret

‎tests/disas/winch/aarch64/br/as_loop_first.wat‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -11,13 +11,13 @@
1111
;; mov x29, sp
1212
;; mov x28, sp
1313
;; mov x9, x0
14-
;; sub sp, sp, #0x10
15-
;; mov x28, sp
14+
;; sub x28, x28, #0x10
15+
;; mov sp, x28
1616
;; stur x0, [x28, #8]
1717
;; stur x1, [x28]
1818
;; mov x16, #3
1919
;; mov w0, w16
20-
;; add sp, sp, #0x10
21-
;; mov x28, sp
20+
;; add x28, x28, #0x10
21+
;; mov sp, x28
2222
;; ldp x29, x30, [sp], #0x10
2323
;; ret

‎tests/disas/winch/aarch64/br/br_jump.wat‎

Lines changed: 9 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -18,24 +18,23 @@
1818
;; mov x29, sp
1919
;; mov x28, sp
2020
;; mov x9, x0
21-
;; sub sp, sp, #0x18
22-
;; mov x28, sp
21+
;; sub x28, x28, #0x18
22+
;; mov sp, x28
2323
;; stur x0, [x28, #0x10]
2424
;; stur x1, [x28, #8]
2525
;; mov x16, #0
2626
;; stur x16, [x28]
2727
;; ldur w16, [x28, #4]
28-
;; sub sp, sp, #4
29-
;; mov x28, sp
28+
;; sub x28, x28, #4
29+
;; mov sp, x28
3030
;; stur w16, [x28]
3131
;; ldur w16, [x28, #8]
32-
;; sub sp, sp, #4
33-
;; mov x28, sp
32+
;; sub x28, x28, #4
33+
;; mov sp, x28
3434
;; stur w16, [x28]
35-
;; add sp, sp, #4
36-
;; mov x28, sp
35+
;; add x28, x28, #4
3736
;; b #0x38
38-
;; 54: add sp, sp, #0x18
39-
;; mov x28, sp
37+
;; 50: add x28, x28, #0x18
38+
;; mov sp, x28
4039
;; ldp x29, x30, [sp], #0x10
4140
;; ret

‎tests/disas/winch/aarch64/br_if/as_br_if_cond.wat‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -10,8 +10,8 @@
1010
;; mov x29, sp
1111
;; mov x28, sp
1212
;; mov x9, x0
13-
;; sub sp, sp, #0x10
14-
;; mov x28, sp
13+
;; sub x28, x28, #0x10
14+
;; mov sp, x28
1515
;; stur x0, [x28, #8]
1616
;; stur x1, [x28]
1717
;; mov x16, #1
@@ -24,7 +24,7 @@
2424
;; tst w0, w0
2525
;; b.ne #0x48
2626
;; b #0x48
27-
;; 48: add sp, sp, #0x10
28-
;; mov x28, sp
27+
;; 48: add x28, x28, #0x10
28+
;; mov sp, x28
2929
;; ldp x29, x30, [sp], #0x10
3030
;; ret

‎tests/disas/winch/aarch64/br_if/as_br_value.wat‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -10,8 +10,8 @@
1010
;; mov x29, sp
1111
;; mov x28, sp
1212
;; mov x9, x0
13-
;; sub sp, sp, #0x10
14-
;; mov x28, sp
13+
;; sub x28, x28, #0x10
14+
;; mov sp, x28
1515
;; stur x0, [x28, #8]
1616
;; stur x1, [x28]
1717
;; mov x16, #2
@@ -21,7 +21,7 @@
2121
;; tst w1, w1
2222
;; b.ne #0x3c
2323
;; b #0x3c
24-
;; 3c: add sp, sp, #0x10
25-
;; mov x28, sp
24+
;; 3c: add x28, x28, #0x10
25+
;; mov sp, x28
2626
;; ldp x29, x30, [sp], #0x10
2727
;; ret

‎tests/disas/winch/aarch64/br_if/as_if_cond.wat‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -16,8 +16,8 @@
1616
;; mov x29, sp
1717
;; mov x28, sp
1818
;; mov x9, x0
19-
;; sub sp, sp, #0x18
20-
;; mov x28, sp
19+
;; sub x28, x28, #0x18
20+
;; mov sp, x28
2121
;; stur x0, [x28, #0x10]
2222
;; stur x1, [x28, #8]
2323
;; stur w2, [x28, #4]
@@ -35,7 +35,7 @@
3535
;; b #0x5c
3636
;; 54: mov x16, #3
3737
;; mov w0, w16
38-
;; add sp, sp, #0x18
39-
;; mov x28, sp
38+
;; add x28, x28, #0x18
39+
;; mov sp, x28
4040
;; ldp x29, x30, [sp], #0x10
4141
;; ret

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